From: Jan Beulich <jbeulich@suse.com>
To: "xen-devel@lists.xenproject.org" <xen-devel@lists.xenproject.org>
Cc: "Andrew Cooper" <andrew.cooper3@citrix.com>,
"Wei Liu" <wl@xen.org>, "Roger Pau Monné" <roger.pau@citrix.com>
Subject: [PATCH 1/5] x86/mwait-idle: mention assumption that WBINVD is not needed
Date: Mon, 6 Sep 2021 14:59:46 +0200 [thread overview]
Message-ID: <0ebb0de3-2500-a9a2-8128-64b9d4a27cb7@suse.com> (raw)
In-Reply-To: <e16ff1ad-b1c5-f4e0-9336-716eceb93a9f@suse.com>
From: Alexander Monakov <amonakov@ispras.ru>
Intel SDM does not explicitly say that entering a C-state via MWAIT will
implicitly flush CPU caches as appropriate for that C-state. However,
documentation for individual Intel CPU generations does mention this
behavior.
Since intel_idle binds to any Intel CPU with MWAIT, list this assumption
of MWAIT behavior.
In passing, reword opening comment to make it clear that the driver can
load on any old and future Intel CPU with MWAIT.
Signed-off-by: Alexander Monakov <amonakov@ispras.ru>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
[Linux commit: 8bb2e2a887afdf8a39e68fa0dccf82a168aae655]
Dropped "reword opending comment" part - this doesn't apply to our code:
First thing mwait_idle_probe() does is call x86_match_cpu(); we do not
have a 2nd such call looking for just MWAIT (in order to the use _CST
data directly, which we can't get our hands at _CST at this point yet).
Signed-off-by: Jan Beulich <jbeulich@suse.com>
--- a/xen/arch/x86/cpu/mwait-idle.c
+++ b/xen/arch/x86/cpu/mwait-idle.c
@@ -31,6 +31,10 @@
*
* Chipset BM_STS (bus master status) bit is a NOP
* for preventing entry into deep C-states
+ *
+ * CPU will flush caches as needed when entering a C-state via MWAIT
+ * (in contrast to entering ACPI C3, in which case the WBINVD
+ * instruction needs to be executed to flush the caches)
*/
/*
next prev parent reply other threads:[~2021-09-06 13:00 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-09-06 12:58 [PATCH 0/5] x86/mwait-idle: updates from Linux Jan Beulich
2021-09-06 12:59 ` Jan Beulich [this message]
2022-01-18 10:18 ` [PATCH 1/5] x86/mwait-idle: mention assumption that WBINVD is not needed Roger Pau Monné
2021-09-06 13:00 ` [PATCH 2/5] x86/mwait-idle: add SnowRidge C-state table Jan Beulich
2022-01-18 10:17 ` Roger Pau Monné
2022-01-18 14:05 ` Jan Beulich
2022-01-19 12:03 ` Roger Pau Monné
2021-09-06 13:01 ` [PATCH 3/5] x86/mwait-idle: update ICX C6 data Jan Beulich
2022-01-18 10:20 ` Roger Pau Monné
2022-01-18 14:08 ` Jan Beulich
2021-09-06 13:01 ` [PATCH 4/5] x86/mwait-idle: add Icelake-D support Jan Beulich
2022-01-18 10:31 ` Roger Pau Monné
2021-09-06 13:02 ` [PATCH 5/5] x86/mwait-idle: adjust the SKX C6 parameters if PC6 is disabled Jan Beulich
2022-01-18 10:48 ` Roger Pau Monné
2022-01-18 14:11 ` Jan Beulich
2021-11-24 9:47 ` Ping: [PATCH 0/5] x86/mwait-idle: updates from Linux Jan Beulich
2022-01-04 16:31 ` Jan Beulich
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