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From: Jason Gunthorpe <jgg@nvidia.com>
To: "Christian König" <christian.koenig@amd.com>,
	dri-devel@lists.freedesktop.org,
	"Leon Romanovsky" <leon@kernel.org>,
	linaro-mm-sig@lists.linaro.org, linux-media@vger.kernel.org,
	linux-rdma@vger.kernel.org, netdev@vger.kernel.org,
	"Saeed Mahameed" <saeedm@nvidia.com>,
	"Sumit Semwal" <sumit.semwal@linaro.org>
Cc: Kamal Heib <kamalheib1@gmail.com>,
	Mohammad Kabat <mohammadkab@nvidia.com>
Subject: [PATCH 1/4] net/mlx5: Add IFC bits for mkey ATS
Date: Thu,  1 Sep 2022 11:20:53 -0300	[thread overview]
Message-ID: <1-v1-bd147097458e+ede-umem_dmabuf_jgg@nvidia.com> (raw)
In-Reply-To: <0-v1-bd147097458e+ede-umem_dmabuf_jgg@nvidia.com>

Allows telling a mkey to use PCI ATS for DMA that flows through it.

Signed-off-by: Jason Gunthorpe <jgg@nvidia.com>
---
 include/linux/mlx5/mlx5_ifc.h | 11 ++++++++---
 1 file changed, 8 insertions(+), 3 deletions(-)

diff --git a/include/linux/mlx5/mlx5_ifc.h b/include/linux/mlx5/mlx5_ifc.h
index 4acd5610e96bc0..92602e33a82c42 100644
--- a/include/linux/mlx5/mlx5_ifc.h
+++ b/include/linux/mlx5/mlx5_ifc.h
@@ -1707,7 +1707,9 @@ struct mlx5_ifc_cmd_hca_cap_bits {
 	u8         steering_format_version[0x4];
 	u8         create_qp_start_hint[0x18];
 
-	u8         reserved_at_460[0x3];
+	u8         reserved_at_460[0x1];
+	u8         ats[0x1];
+	u8         reserved_at_462[0x1];
 	u8         log_max_uctx[0x5];
 	u8         reserved_at_468[0x2];
 	u8         ipsec_offload[0x1];
@@ -3873,7 +3875,9 @@ struct mlx5_ifc_mkc_bits {
 	u8         lw[0x1];
 	u8         lr[0x1];
 	u8         access_mode_1_0[0x2];
-	u8         reserved_at_18[0x8];
+	u8         reserved_at_18[0x2];
+	u8         ma_translation_mode[0x2];
+	u8         reserved_at_1c[0x4];
 
 	u8         qpn[0x18];
 	u8         mkey_7_0[0x8];
@@ -11134,7 +11138,8 @@ struct mlx5_ifc_dealloc_memic_out_bits {
 struct mlx5_ifc_umem_bits {
 	u8         reserved_at_0[0x80];
 
-	u8         reserved_at_80[0x1b];
+	u8         ats[0x1];
+	u8         reserved_at_81[0x1a];
 	u8         log_page_size[0x5];
 
 	u8         page_offset[0x20];
-- 
2.37.2


WARNING: multiple messages have this Message-ID (diff)
From: Jason Gunthorpe <jgg@nvidia.com>
To: "Christian König" <christian.koenig@amd.com>,
	dri-devel@lists.freedesktop.org,
	"Leon Romanovsky" <leon@kernel.org>,
	linaro-mm-sig@lists.linaro.org, linux-media@vger.kernel.org,
	linux-rdma@vger.kernel.org, netdev@vger.kernel.org,
	"Saeed Mahameed" <saeedm@nvidia.com>,
	"Sumit Semwal" <sumit.semwal@linaro.org>
Cc: Mohammad Kabat <mohammadkab@nvidia.com>,
	Kamal Heib <kamalheib1@gmail.com>
Subject: [PATCH 1/4] net/mlx5: Add IFC bits for mkey ATS
Date: Thu,  1 Sep 2022 11:20:53 -0300	[thread overview]
Message-ID: <1-v1-bd147097458e+ede-umem_dmabuf_jgg@nvidia.com> (raw)
In-Reply-To: <0-v1-bd147097458e+ede-umem_dmabuf_jgg@nvidia.com>

Allows telling a mkey to use PCI ATS for DMA that flows through it.

Signed-off-by: Jason Gunthorpe <jgg@nvidia.com>
---
 include/linux/mlx5/mlx5_ifc.h | 11 ++++++++---
 1 file changed, 8 insertions(+), 3 deletions(-)

diff --git a/include/linux/mlx5/mlx5_ifc.h b/include/linux/mlx5/mlx5_ifc.h
index 4acd5610e96bc0..92602e33a82c42 100644
--- a/include/linux/mlx5/mlx5_ifc.h
+++ b/include/linux/mlx5/mlx5_ifc.h
@@ -1707,7 +1707,9 @@ struct mlx5_ifc_cmd_hca_cap_bits {
 	u8         steering_format_version[0x4];
 	u8         create_qp_start_hint[0x18];
 
-	u8         reserved_at_460[0x3];
+	u8         reserved_at_460[0x1];
+	u8         ats[0x1];
+	u8         reserved_at_462[0x1];
 	u8         log_max_uctx[0x5];
 	u8         reserved_at_468[0x2];
 	u8         ipsec_offload[0x1];
@@ -3873,7 +3875,9 @@ struct mlx5_ifc_mkc_bits {
 	u8         lw[0x1];
 	u8         lr[0x1];
 	u8         access_mode_1_0[0x2];
-	u8         reserved_at_18[0x8];
+	u8         reserved_at_18[0x2];
+	u8         ma_translation_mode[0x2];
+	u8         reserved_at_1c[0x4];
 
 	u8         qpn[0x18];
 	u8         mkey_7_0[0x8];
@@ -11134,7 +11138,8 @@ struct mlx5_ifc_dealloc_memic_out_bits {
 struct mlx5_ifc_umem_bits {
 	u8         reserved_at_0[0x80];
 
-	u8         reserved_at_80[0x1b];
+	u8         ats[0x1];
+	u8         reserved_at_81[0x1a];
 	u8         log_page_size[0x5];
 
 	u8         page_offset[0x20];
-- 
2.37.2


  reply	other threads:[~2022-09-01 14:21 UTC|newest]

Thread overview: 12+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-09-01 14:20 [PATCH 0/4] RDMA/mlx5: Support DMABUF in umems and enable ATS Jason Gunthorpe
2022-09-01 14:20 ` Jason Gunthorpe
2022-09-01 14:20 ` Jason Gunthorpe [this message]
2022-09-01 14:20   ` [PATCH 1/4] net/mlx5: Add IFC bits for mkey ATS Jason Gunthorpe
2022-09-01 14:20 ` [PATCH 2/4] RDMA/core: Add UVERBS_ATTR_RAW_FD Jason Gunthorpe
2022-09-01 14:20   ` Jason Gunthorpe
2022-09-01 14:20 ` [PATCH 3/4] RDMA/mlx5: Add support for dmabuf to devx umem Jason Gunthorpe
2022-09-01 14:20   ` Jason Gunthorpe
2022-09-01 14:20 ` [PATCH 4/4] RDMA/mlx5: Enable ATS support for MRs and umems Jason Gunthorpe
2022-09-01 14:20   ` Jason Gunthorpe
2022-09-26 17:51 ` [PATCH 0/4] RDMA/mlx5: Support DMABUF in umems and enable ATS Jason Gunthorpe
2022-09-26 17:51   ` Jason Gunthorpe

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