From: "Zhang, Yang" <yang.zhang@intel.com>
To: "kvm-ia64@vger.kernel.org" <kvm-ia64@vger.kernel.org>
Cc: "kvm@vger.kernel.org" <kvm@vger.kernel.org>,
Avi Kivity <avi@redhat.com>,
"Zhang, Xiantao" <xiantao.zhang@intel.com>
Subject: [PATCH] KVM: Qemu: Flush i-cache after ide-dma operation in IA64
Date: Thu, 2 Apr 2009 10:01:42 +0800 [thread overview]
Message-ID: <10C63FAD690C13458F0B32BCED571F140F98ED4B@pdsmsx502.ccr.corp.intel.com> (raw)
[-- Attachment #1: Type: text/plain, Size: 1852 bytes --]
The data from dma will include instructions. In order to exeuting the right
instruction, we should to flush the i-cache to ensure those data can be see
by cpu.
Signed-off-by: Xiantao Zhang <xiantao.zhang@intel.com>
Signed-off-by: Yang Zhang <yang.zhang@intel.com>
---
diff --git a/qemu/cache-utils.h b/qemu/cache-utils.h
index b45fde4..5e11d12 100644
--- a/qemu/cache-utils.h
+++ b/qemu/cache-utils.h
@@ -33,8 +33,22 @@ static inline void flush_icache_range(unsigned long start, unsigned long stop)
asm volatile ("sync" : : : "memory");
asm volatile ("isync" : : : "memory");
}
+#define qemu_sync_idcache flush_icache_range
+#else
+#ifdef __ia64__
+static inline void qemu_sync_idcache(unsigned long start, unsigned long stop)
+{
+ while (start < stop) {
+ asm volatile ("fc %0" :: "r"(start));
+ start += 32;
+ }
+ asm volatile (";;sync.i;;srlz.i;;");
+}
#else
+static inline void qemu_sync_idcache(unsigned long start, unsigned long stop)
+#endif
+
#define qemu_cache_utils_init(envp) do { (void) (envp); } while (0)
#endif
diff --git a/qemu/cutils.c b/qemu/cutils.c
index 5b36cc6..7b57173 100644
--- a/qemu/cutils.c
+++ b/qemu/cutils.c
@@ -23,6 +23,7 @@
*/
#include "qemu-common.h"
#include "host-utils.h"
+#include "cache-utils.h"
#include <assert.h>
void pstrcpy(char *buf, int buf_size, const char *str)
@@ -215,6 +216,8 @@ void qemu_iovec_from_buffer(QEMUIOVector *qiov, const void *buf, size_t count)
if (copy > qiov->iov[i].iov_len)
copy = qiov->iov[i].iov_len;
memcpy(qiov->iov[i].iov_base, p, copy);
+ qemu_sync_idcache((unsigned long)qiov->iov[i].iov_base,
+ (unsigned long)(qiov->iov[i].iov_base + copy));
p += copy;
count -= copy;
}
--
1.6.0.rc1
[-- Attachment #2: 0001-KVM-Qemu-Flush-icache-after-ide-dma-operation-in-IA64.patch --]
[-- Type: application/octet-stream, Size: 2120 bytes --]
From 3b706bda62fbddfa2bca414d8c0fb7cda904b7db Mon Sep 17 00:00:00 2001
From: Yang Zhang <Yang Zhang>
Date: Wed, 1 Apr 2009 01:50:53 -0400
Subject: [PATCH] KVM: Qemu: Flush i-cache after ide-dma operation in IA64
The data from dma will include instructions. In order to exeuting the right
instruction, we should to flush the i-cache to ensure those data can be see
by cpu.
Signed-off-by: Xiantao Zhang <xiantao.zhang@intel.com>
Signed-off-by: Yang Zhang <Yang Zhang>
---
qemu/cache-utils.h | 14 ++++++++++++++
qemu/cutils.c | 3 +++
2 files changed, 17 insertions(+), 0 deletions(-)
diff --git a/qemu/cache-utils.h b/qemu/cache-utils.h
index b45fde4..5e11d12 100644
--- a/qemu/cache-utils.h
+++ b/qemu/cache-utils.h
@@ -33,8 +33,22 @@ static inline void flush_icache_range(unsigned long start, unsigned long stop)
asm volatile ("sync" : : : "memory");
asm volatile ("isync" : : : "memory");
}
+#define qemu_sync_idcache flush_icache_range
+#else
+#ifdef __ia64__
+static inline void qemu_sync_idcache(unsigned long start, unsigned long stop)
+{
+ while (start < stop) {
+ asm volatile ("fc %0" :: "r"(start));
+ start += 32;
+ }
+ asm volatile (";;sync.i;;srlz.i;;");
+}
#else
+static inline void qemu_sync_idcache(unsigned long start, unsigned long stop)
+#endif
+
#define qemu_cache_utils_init(envp) do { (void) (envp); } while (0)
#endif
diff --git a/qemu/cutils.c b/qemu/cutils.c
index 5b36cc6..7b57173 100644
--- a/qemu/cutils.c
+++ b/qemu/cutils.c
@@ -23,6 +23,7 @@
*/
#include "qemu-common.h"
#include "host-utils.h"
+#include "cache-utils.h"
#include <assert.h>
void pstrcpy(char *buf, int buf_size, const char *str)
@@ -215,6 +216,8 @@ void qemu_iovec_from_buffer(QEMUIOVector *qiov, const void *buf, size_t count)
if (copy > qiov->iov[i].iov_len)
copy = qiov->iov[i].iov_len;
memcpy(qiov->iov[i].iov_base, p, copy);
+ qemu_sync_idcache((unsigned long)qiov->iov[i].iov_base,
+ (unsigned long)(qiov->iov[i].iov_base + copy));
p += copy;
count -= copy;
}
--
1.6.0.rc1
WARNING: multiple messages have this Message-ID (diff)
From: "Zhang, Yang" <yang.zhang@intel.com>
To: kvm-ia64@vger.kernel.org
Subject: [PATCH] KVM: Qemu: Flush i-cache after ide-dma operation in IA64
Date: Thu, 02 Apr 2009 02:01:42 +0000 [thread overview]
Message-ID: <10C63FAD690C13458F0B32BCED571F140F98ED4B@pdsmsx502.ccr.corp.intel.com> (raw)
[-- Attachment #1: Type: text/plain, Size: 1852 bytes --]
The data from dma will include instructions. In order to exeuting the right
instruction, we should to flush the i-cache to ensure those data can be see
by cpu.
Signed-off-by: Xiantao Zhang <xiantao.zhang@intel.com>
Signed-off-by: Yang Zhang <yang.zhang@intel.com>
---
diff --git a/qemu/cache-utils.h b/qemu/cache-utils.h
index b45fde4..5e11d12 100644
--- a/qemu/cache-utils.h
+++ b/qemu/cache-utils.h
@@ -33,8 +33,22 @@ static inline void flush_icache_range(unsigned long start, unsigned long stop)
asm volatile ("sync" : : : "memory");
asm volatile ("isync" : : : "memory");
}
+#define qemu_sync_idcache flush_icache_range
+#else
+#ifdef __ia64__
+static inline void qemu_sync_idcache(unsigned long start, unsigned long stop)
+{
+ while (start < stop) {
+ asm volatile ("fc %0" :: "r"(start));
+ start += 32;
+ }
+ asm volatile (";;sync.i;;srlz.i;;");
+}
#else
+static inline void qemu_sync_idcache(unsigned long start, unsigned long stop)
+#endif
+
#define qemu_cache_utils_init(envp) do { (void) (envp); } while (0)
#endif
diff --git a/qemu/cutils.c b/qemu/cutils.c
index 5b36cc6..7b57173 100644
--- a/qemu/cutils.c
+++ b/qemu/cutils.c
@@ -23,6 +23,7 @@
*/
#include "qemu-common.h"
#include "host-utils.h"
+#include "cache-utils.h"
#include <assert.h>
void pstrcpy(char *buf, int buf_size, const char *str)
@@ -215,6 +216,8 @@ void qemu_iovec_from_buffer(QEMUIOVector *qiov, const void *buf, size_t count)
if (copy > qiov->iov[i].iov_len)
copy = qiov->iov[i].iov_len;
memcpy(qiov->iov[i].iov_base, p, copy);
+ qemu_sync_idcache((unsigned long)qiov->iov[i].iov_base,
+ (unsigned long)(qiov->iov[i].iov_base + copy));
p += copy;
count -= copy;
}
--
1.6.0.rc1
[-- Attachment #2: 0001-KVM-Qemu-Flush-icache-after-ide-dma-operation-in-IA64.patch --]
[-- Type: application/octet-stream, Size: 2120 bytes --]
From 3b706bda62fbddfa2bca414d8c0fb7cda904b7db Mon Sep 17 00:00:00 2001
From: Yang Zhang <Yang Zhang>
Date: Wed, 1 Apr 2009 01:50:53 -0400
Subject: [PATCH] KVM: Qemu: Flush i-cache after ide-dma operation in IA64
The data from dma will include instructions. In order to exeuting the right
instruction, we should to flush the i-cache to ensure those data can be see
by cpu.
Signed-off-by: Xiantao Zhang <xiantao.zhang@intel.com>
Signed-off-by: Yang Zhang <Yang Zhang>
---
qemu/cache-utils.h | 14 ++++++++++++++
qemu/cutils.c | 3 +++
2 files changed, 17 insertions(+), 0 deletions(-)
diff --git a/qemu/cache-utils.h b/qemu/cache-utils.h
index b45fde4..5e11d12 100644
--- a/qemu/cache-utils.h
+++ b/qemu/cache-utils.h
@@ -33,8 +33,22 @@ static inline void flush_icache_range(unsigned long start, unsigned long stop)
asm volatile ("sync" : : : "memory");
asm volatile ("isync" : : : "memory");
}
+#define qemu_sync_idcache flush_icache_range
+#else
+#ifdef __ia64__
+static inline void qemu_sync_idcache(unsigned long start, unsigned long stop)
+{
+ while (start < stop) {
+ asm volatile ("fc %0" :: "r"(start));
+ start += 32;
+ }
+ asm volatile (";;sync.i;;srlz.i;;");
+}
#else
+static inline void qemu_sync_idcache(unsigned long start, unsigned long stop)
+#endif
+
#define qemu_cache_utils_init(envp) do { (void) (envp); } while (0)
#endif
diff --git a/qemu/cutils.c b/qemu/cutils.c
index 5b36cc6..7b57173 100644
--- a/qemu/cutils.c
+++ b/qemu/cutils.c
@@ -23,6 +23,7 @@
*/
#include "qemu-common.h"
#include "host-utils.h"
+#include "cache-utils.h"
#include <assert.h>
void pstrcpy(char *buf, int buf_size, const char *str)
@@ -215,6 +216,8 @@ void qemu_iovec_from_buffer(QEMUIOVector *qiov, const void *buf, size_t count)
if (copy > qiov->iov[i].iov_len)
copy = qiov->iov[i].iov_len;
memcpy(qiov->iov[i].iov_base, p, copy);
+ qemu_sync_idcache((unsigned long)qiov->iov[i].iov_base,
+ (unsigned long)(qiov->iov[i].iov_base + copy));
p += copy;
count -= copy;
}
--
1.6.0.rc1
next reply other threads:[~2009-04-02 2:05 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2009-04-02 2:01 Zhang, Yang [this message]
2009-04-02 2:01 ` [PATCH] KVM: Qemu: Flush i-cache after ide-dma operation in IA64 Zhang, Yang
2009-04-02 8:55 ` Avi Kivity
2009-04-02 8:55 ` Avi Kivity
2009-04-02 15:41 ` tgingold
2009-04-02 15:41 ` tgingold
2009-04-02 15:53 ` Avi Kivity
2009-04-02 15:53 ` Avi Kivity
2009-04-02 15:59 ` Avi Kivity
2009-04-02 15:59 ` Avi Kivity
2009-04-03 1:22 ` Zhang, Xiantao
2009-04-03 1:22 ` Zhang, Xiantao
2009-04-03 1:13 ` Zhang, Xiantao
2009-04-03 1:13 ` Zhang, Xiantao
2009-04-03 1:31 ` Zhang, Xiantao
2009-04-03 1:31 ` Zhang, Xiantao
2009-04-03 11:06 ` Avi Kivity
2009-04-03 11:06 ` Avi Kivity
2009-04-06 16:31 ` Hollis Blanchard
2009-04-06 16:31 ` [PATCH] KVM: Qemu: Flush i-cache after ide-dma operation in Hollis Blanchard
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