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From: Tero Kristo <tero.kristo@nokia.com>
To: linux-omap@vger.kernel.org
Subject: [PATCH 2/4] RX51: SDRAM: Cleanup the init code
Date: Mon, 26 Oct 2009 18:15:24 +0200	[thread overview]
Message-ID: <1256573726-29800-3-git-send-email-tero.kristo@nokia.com> (raw)
In-Reply-To: <1256573726-29800-2-git-send-email-tero.kristo@nokia.com>

From: Tero Kristo <tero.kristo@nokia.com>

Removed a few unused functions + macro definitions + variables from the code.

Signed-off-by: Tero Kristo <tero.kristo@nokia.com>
---
 arch/arm/mach-omap2/board-rx51-sdram.c |   51 --------------------------------
 1 files changed, 0 insertions(+), 51 deletions(-)

diff --git a/arch/arm/mach-omap2/board-rx51-sdram.c b/arch/arm/mach-omap2/board-rx51-sdram.c
index 78cd5ed..b5d1c55 100644
--- a/arch/arm/mach-omap2/board-rx51-sdram.c
+++ b/arch/arm/mach-omap2/board-rx51-sdram.c
@@ -67,57 +67,6 @@ static const struct sdram_info rx51_info = {
 	.row_lines = 13,
 };
 
-#define CM_BASE		    0x48004000
-
-#define CM_CLKSEL_CORE      0x0a40
-#define CM_CLKSEL1_PLL      0x0d40
-
-#define PRM_CLKSEL          0x48306d40
-#define PRM_CLKSRC_CTRL     0x48307270
-
-static u32 cm_base = CM_BASE;
-
-static inline u32 cm_read_reg(int idx)
-{
-	return *(u32 *)OMAP2_L4_IO_ADDRESS(cm_base + idx);
-}
-
-static const unsigned long sys_clk_rate_table[] = {
-	12000, 13000, 19200, 26000, 38400, 16800
-};
-
-static unsigned long get_sys_clk_rate(void)
-{
-	unsigned long rate;
-
-	rate = sys_clk_rate_table[*(u32 *)OMAP2_L4_IO_ADDRESS(PRM_CLKSEL) & 0x07];
-	if (((*(u32 *)OMAP2_L4_IO_ADDRESS(PRM_CLKSRC_CTRL) >> 6) & 0x03) == 0x02)
-		rate /= 2;
-	return rate;
-}
-
-static unsigned long get_core_rate(void)
-{
-	unsigned long rate;
-	u32 l;
-
-	l = cm_read_reg(CM_CLKSEL1_PLL);
-	rate = get_sys_clk_rate();
-	rate *= ((l >> 16) & 0x7ff);
-	rate /= ((l >> 8) & 0x7f) + 1;
-	rate /= (l >> 27) & 0x1f;
-
-	return rate;
-}
-
-static unsigned long get_l3_rate(void)
-{
-	u32 l;
-
-	l = cm_read_reg(CM_CLKSEL_CORE);
-	return get_core_rate() / (l & 0x03);
-}
-
 static unsigned long sdrc_get_fclk_period(long rate)
 {
 	/* In picoseconds */
-- 
1.5.4.3


  reply	other threads:[~2009-10-26 16:30 UTC|newest]

Thread overview: 7+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2009-10-26 16:15 [PATCH 0/4] RX51: SDRAM settings changes Tero Kristo
2009-10-26 16:15 ` [PATCH 1/4] RX51: Add SDRAM configs for different OPPs Tero Kristo
2009-10-26 16:15   ` Tero Kristo [this message]
2009-10-26 16:15     ` [PATCH 3/4] RX51: SDRC: change timing values to follow generic memory requirements Tero Kristo
2009-10-26 16:15       ` [PATCH 4/4] RX51: Fix SDRAM RFR timings calculation Tero Kristo
2009-10-26 18:50 ` [PATCH 0/4] RX51: SDRAM settings changes Kevin Hilman
2009-10-27 12:48   ` Tero.Kristo

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