All of lore.kernel.org
 help / color / mirror / Atom feed
From: Santosh Shilimkar <santosh.shilimkar@ti.com>
To: tony@atomide.com
Cc: linux-arm-kernel@lists.infradead.org, linux-omap@vger.kernel.org,
	linux@arm.linux.org.uk,
	Santosh Shilimkar <santosh.shilimkar@ti.com>
Subject: [PATCH 1/6] OMAP4: Fix cpu detection
Date: Wed,  9 Dec 2009 23:59:05 +0530	[thread overview]
Message-ID: <1260383350-32681-1-git-send-email-santosh.shilimkar@ti.com> (raw)

This patch fixes the OMAP4430 cpu detection. Since the omap ID
register is not fused in OMAP4430 ES1.0 silicon, identification is
done using ARM CPUID register.

Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
---
 arch/arm/mach-omap2/id.c              |   27 ++++++++++++++++++++++++++-
 arch/arm/plat-omap/common.c           |    2 +-
 arch/arm/plat-omap/include/plat/cpu.h |    3 ++-
 3 files changed, 29 insertions(+), 3 deletions(-)

diff --git a/arch/arm/mach-omap2/id.c b/arch/arm/mach-omap2/id.c
index f48a4b2..52c6478 100644
--- a/arch/arm/mach-omap2/id.c
+++ b/arch/arm/mach-omap2/id.c
@@ -246,6 +246,31 @@ void __init omap3_check_revision(void)
 	}
 }
 
+void __init omap4_check_revision(void)
+{
+	u32 idcode;
+	u16 hawkeye;
+	u8 rev;
+	char *rev_name = "ES1.0";
+
+	/*
+	 * The IC rev detection is done with hawkeye and rev.
+	 * Note that rev does not map directly to defined processor
+	 * revision numbers as ES1.0 uses value 0.
+	 */
+	idcode = read_tap_reg(OMAP_TAP_IDCODE);
+	hawkeye = (idcode >> 12) & 0xffff;
+	rev = (idcode >> 28) & 0xff;
+
+	if ((hawkeye == 0xb852) && (rev == 0x0)) {
+		omap_revision = OMAP4430_REV_ES1_0;
+		pr_info("OMAP%04x %s\n", omap_rev() >> 16, rev_name);
+		return;
+	}
+
+	printk(KERN_ERR "Unknown OMAP CPU id\n");
+}
+
 #define OMAP3_SHOW_FEATURE(feat)		\
 	if (omap3_has_ ##feat())		\
 		printk(#feat" ");
@@ -336,7 +361,7 @@ void __init omap2_check_revision(void)
 		omap3_check_features();
 		omap3_cpuinfo();
 	} else if (cpu_is_omap44xx()) {
-		printk(KERN_INFO "FIXME: CPU revision = OMAP4430\n");
+		omap4_check_revision();
 		return;
 	} else {
 		pr_err("OMAP revision unknown, please fix!\n");
diff --git a/arch/arm/plat-omap/common.c b/arch/arm/plat-omap/common.c
index cc050b3..3473a80 100644
--- a/arch/arm/plat-omap/common.c
+++ b/arch/arm/plat-omap/common.c
@@ -280,7 +280,7 @@ void __init omap2_set_globals_343x(void)
 #if defined(CONFIG_ARCH_OMAP4)
 static struct omap_globals omap4_globals = {
 	.class	= OMAP443X_CLASS,
-	.tap	= OMAP2_L4_IO_ADDRESS(0x4830a000),
+	.tap	= OMAP2_L4_IO_ADDRESS(OMAP443X_SCM_BASE),
 	.ctrl	= OMAP2_L4_IO_ADDRESS(OMAP443X_CTRL_BASE),
 	.prm	= OMAP2_L4_IO_ADDRESS(OMAP4430_PRM_BASE),
 	.cm	= OMAP2_L4_IO_ADDRESS(OMAP4430_CM_BASE),
diff --git a/arch/arm/plat-omap/include/plat/cpu.h b/arch/arm/plat-omap/include/plat/cpu.h
index 2e17890..2a141ba 100644
--- a/arch/arm/plat-omap/include/plat/cpu.h
+++ b/arch/arm/plat-omap/include/plat/cpu.h
@@ -443,7 +443,8 @@ IS_OMAP_TYPE(3517, 0x3517)
 #define OMAP3505_REV(v)		(OMAP35XX_CLASS | (0x3505 << 16) | (v << 12))
 #define OMAP3517_REV(v)		(OMAP35XX_CLASS | (0x3517 << 16) | (v << 12))
 
-#define OMAP443X_CLASS		0x44300034
+#define OMAP443X_CLASS		0x44300044
+#define OMAP4430_REV_ES1_0	0x44300044
 
 /*
  * omap_chip bits
-- 
1.6.0.4


WARNING: multiple messages have this Message-ID (diff)
From: santosh.shilimkar@ti.com (Santosh Shilimkar)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 1/6] OMAP4: Fix cpu detection
Date: Wed,  9 Dec 2009 23:59:05 +0530	[thread overview]
Message-ID: <1260383350-32681-1-git-send-email-santosh.shilimkar@ti.com> (raw)

This patch fixes the OMAP4430 cpu detection. Since the omap ID
register is not fused in OMAP4430 ES1.0 silicon, identification is
done using ARM CPUID register.

Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
---
 arch/arm/mach-omap2/id.c              |   27 ++++++++++++++++++++++++++-
 arch/arm/plat-omap/common.c           |    2 +-
 arch/arm/plat-omap/include/plat/cpu.h |    3 ++-
 3 files changed, 29 insertions(+), 3 deletions(-)

diff --git a/arch/arm/mach-omap2/id.c b/arch/arm/mach-omap2/id.c
index f48a4b2..52c6478 100644
--- a/arch/arm/mach-omap2/id.c
+++ b/arch/arm/mach-omap2/id.c
@@ -246,6 +246,31 @@ void __init omap3_check_revision(void)
 	}
 }
 
+void __init omap4_check_revision(void)
+{
+	u32 idcode;
+	u16 hawkeye;
+	u8 rev;
+	char *rev_name = "ES1.0";
+
+	/*
+	 * The IC rev detection is done with hawkeye and rev.
+	 * Note that rev does not map directly to defined processor
+	 * revision numbers as ES1.0 uses value 0.
+	 */
+	idcode = read_tap_reg(OMAP_TAP_IDCODE);
+	hawkeye = (idcode >> 12) & 0xffff;
+	rev = (idcode >> 28) & 0xff;
+
+	if ((hawkeye == 0xb852) && (rev == 0x0)) {
+		omap_revision = OMAP4430_REV_ES1_0;
+		pr_info("OMAP%04x %s\n", omap_rev() >> 16, rev_name);
+		return;
+	}
+
+	printk(KERN_ERR "Unknown OMAP CPU id\n");
+}
+
 #define OMAP3_SHOW_FEATURE(feat)		\
 	if (omap3_has_ ##feat())		\
 		printk(#feat" ");
@@ -336,7 +361,7 @@ void __init omap2_check_revision(void)
 		omap3_check_features();
 		omap3_cpuinfo();
 	} else if (cpu_is_omap44xx()) {
-		printk(KERN_INFO "FIXME: CPU revision = OMAP4430\n");
+		omap4_check_revision();
 		return;
 	} else {
 		pr_err("OMAP revision unknown, please fix!\n");
diff --git a/arch/arm/plat-omap/common.c b/arch/arm/plat-omap/common.c
index cc050b3..3473a80 100644
--- a/arch/arm/plat-omap/common.c
+++ b/arch/arm/plat-omap/common.c
@@ -280,7 +280,7 @@ void __init omap2_set_globals_343x(void)
 #if defined(CONFIG_ARCH_OMAP4)
 static struct omap_globals omap4_globals = {
 	.class	= OMAP443X_CLASS,
-	.tap	= OMAP2_L4_IO_ADDRESS(0x4830a000),
+	.tap	= OMAP2_L4_IO_ADDRESS(OMAP443X_SCM_BASE),
 	.ctrl	= OMAP2_L4_IO_ADDRESS(OMAP443X_CTRL_BASE),
 	.prm	= OMAP2_L4_IO_ADDRESS(OMAP4430_PRM_BASE),
 	.cm	= OMAP2_L4_IO_ADDRESS(OMAP4430_CM_BASE),
diff --git a/arch/arm/plat-omap/include/plat/cpu.h b/arch/arm/plat-omap/include/plat/cpu.h
index 2e17890..2a141ba 100644
--- a/arch/arm/plat-omap/include/plat/cpu.h
+++ b/arch/arm/plat-omap/include/plat/cpu.h
@@ -443,7 +443,8 @@ IS_OMAP_TYPE(3517, 0x3517)
 #define OMAP3505_REV(v)		(OMAP35XX_CLASS | (0x3505 << 16) | (v << 12))
 #define OMAP3517_REV(v)		(OMAP35XX_CLASS | (0x3517 << 16) | (v << 12))
 
-#define OMAP443X_CLASS		0x44300034
+#define OMAP443X_CLASS		0x44300044
+#define OMAP4430_REV_ES1_0	0x44300044
 
 /*
  * omap_chip bits
-- 
1.6.0.4

             reply	other threads:[~2009-12-09 18:29 UTC|newest]

Thread overview: 40+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2009-12-09 18:29 Santosh Shilimkar [this message]
2009-12-09 18:29 ` [PATCH 1/6] OMAP4: Fix cpu detection Santosh Shilimkar
2009-12-09 18:29 ` [PATCH 2/6] OMAP4: Fix SRAM base and size Santosh Shilimkar
2009-12-09 18:29   ` Santosh Shilimkar
2009-12-09 18:29   ` [PATCH 3/6] OMAP4: Re-arrange the low level debug code Santosh Shilimkar
2009-12-09 18:29     ` Santosh Shilimkar
2009-12-09 18:29     ` [PATCH 4/6] OMAP4: AuxCoreBoot registers only accessible in secure mode Santosh Shilimkar
2009-12-09 18:29       ` Santosh Shilimkar
2009-12-09 18:29       ` [PATCH 5/6] OMAP4: Remove the secondary wait loop Santosh Shilimkar
2009-12-09 18:29         ` Santosh Shilimkar
2009-12-09 18:29         ` [PATCH 6/6] OMAP4: Sync up omap4430 defconfig Santosh Shilimkar
2009-12-09 18:29           ` Santosh Shilimkar
2009-12-09 18:45           ` Pandita, Vikram
2009-12-09 18:45             ` Pandita, Vikram
2009-12-09 18:49             ` Shilimkar, Santosh
2009-12-09 18:49               ` Shilimkar, Santosh
2009-12-09 18:52               ` Pandita, Vikram
2009-12-09 18:52                 ` Pandita, Vikram
2009-12-09 18:55                 ` Shilimkar, Santosh
2009-12-09 18:55                   ` Shilimkar, Santosh
2009-12-09 18:58               ` Gadiyar, Anand
2009-12-09 18:58                 ` Gadiyar, Anand
2009-12-11 22:21           ` [APPLIED] > >[PATCH " Tony Lindgren
2009-12-11 22:21         ` [APPLIED] [PATCH 5/6] OMAP4: Remove the secondary wait loop Tony Lindgren
2009-12-11 22:20       ` [APPLIED] [PATCH 4/6] OMAP4: AuxCoreBoot registers only accessible in secure Tony Lindgren
2009-12-10 10:35     ` [PATCH 3/6] OMAP4: Re-arrange the low level debug code Sergei Shtylyov
2009-12-10 11:27       ` Shilimkar, Santosh
2009-12-10 11:27         ` Shilimkar, Santosh
2009-12-10 12:56         ` Sergei Shtylyov
2009-12-11 22:18   ` [APPLIED] [PATCH 2/6] OMAP4: Fix SRAM base and size Tony Lindgren
2009-12-09 19:30 ` [PATCH 1/6] OMAP4: Fix cpu detection Nishanth Menon
2009-12-09 19:30   ` Nishanth Menon
2009-12-09 19:50   ` Shilimkar, Santosh
2009-12-09 19:50     ` Shilimkar, Santosh
2009-12-09 19:53     ` Nishanth Menon
2009-12-09 19:53       ` Nishanth Menon
2009-12-09 19:33 ` Cousson, Benoit
2009-12-09 19:33   ` Cousson, Benoit
2009-12-09 19:37   ` Shilimkar, Santosh
2009-12-09 19:37     ` Shilimkar, Santosh

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=1260383350-32681-1-git-send-email-santosh.shilimkar@ti.com \
    --to=santosh.shilimkar@ti.com \
    --cc=linux-arm-kernel@lists.infradead.org \
    --cc=linux-omap@vger.kernel.org \
    --cc=linux@arm.linux.org.uk \
    --cc=tony@atomide.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.