[PATCH 08/11] drm/i915: Add RING_WAIT reset to hangcheck

From: Chris Wilson <chris@chris-wilson.co.uk>
To: jbarnes@virtuousgeek.org
Cc: intel-gfx@lists.freedesktop.org
Subject: [PATCH 08/11] drm/i915: Add RING_WAIT reset to hangcheck
Date: Wed, 11 Aug 2010 10:31:33 +0100	[thread overview]
Message-ID: <1281519096-5152-9-git-send-email-chris@chris-wilson.co.uk> (raw)
In-Reply-To: <1281519096-5152-1-git-send-email-chris@chris-wilson.co.uk>

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
---
 drivers/gpu/drm/i915/i915_irq.c |   11 +++++++++++
 1 files changed, 11 insertions(+), 0 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index 69a36fc..21c7d77 100644
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -1322,6 +1322,16 @@ void i915_hangcheck_elapsed(unsigned long data)
 	    dev_priv->last_instdone1 == instdone1) {
 		if (dev_priv->hangcheck_count++ > 1) {
 			DRM_ERROR("Hangcheck timer elapsed... GPU hung\n");
+
+			if (!IS_GEN2(dev)) {
+				u32 tmp = I915_READ(PRB0_CTL);
+				if (tmp & RING_WAIT) {
+					I915_WRITE(PRB0_CTL, tmp);
+					POSTING_READ(PRB0_CTL);
+					goto out;
+				}
+			}
+
 			i915_handle_error(dev, true);
 			return;
 		}
@@ -1333,6 +1343,7 @@ void i915_hangcheck_elapsed(unsigned long data)
 		dev_priv->last_instdone1 = instdone1;
 	}
 
+out:
 	/* Reset timer case chip hangs without another request being added */
 	mod_timer(&dev_priv->hangcheck_timer, jiffies + DRM_I915_HANGCHECK_PERIOD);
 }
-- 
1.7.1
