From: "Xiang, Haihao" <haihao.xiang@intel.com>
To: intel-gfx@lists.freedesktop.org
Subject: [PATCH 2/6] Xv: Send instruction doesn't use implied move when sampling YUV surface
Date: Thu, 21 Oct 2010 16:55:42 +0800 [thread overview]
Message-ID: <1287651346-8041-3-git-send-email-haihao.xiang@intel.com> (raw)
In-Reply-To: <1287651346-8041-1-git-send-email-haihao.xiang@intel.com>
The two fragments will be reused for sampling YUV surface
and send doesn't have implied move on Sandybridge
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
---
src/render_program/exa_wm_src_sample_argb.g4a | 3 ++-
src/render_program/exa_wm_src_sample_argb.g4b | 3 ++-
src/render_program/exa_wm_src_sample_argb.g4b.gen5 | 3 ++-
src/render_program/exa_wm_src_sample_planar.g4a | 7 ++++---
src/render_program/exa_wm_src_sample_planar.g4b | 7 ++++---
.../exa_wm_src_sample_planar.g4b.gen5 | 7 ++++---
6 files changed, 18 insertions(+), 12 deletions(-)
diff --git a/src/render_program/exa_wm_src_sample_argb.g4a b/src/render_program/exa_wm_src_sample_argb.g4a
index c20f53f..384fe26 100644
--- a/src/render_program/exa_wm_src_sample_argb.g4a
+++ b/src/render_program/exa_wm_src_sample_argb.g4a
@@ -36,12 +36,13 @@ include(`exa_wm.g4i')
/* load argb */
mov (1) g0.8<1>UD 0x00000000UD { align1 mask_disable };
+mov (8) src_msg<1>UD g0<8,8,1>UD { align1 }; /* copy to msg start reg*/
/* src_msg will be copied with g0, as it contains send desc */
/* emit sampler 'send' cmd */
send (16) src_msg_ind /* msg reg index */
src_sample_base<1>UW /* readback */
- g0<8,8,1>UW /* copy to msg start reg*/
+ null
sampler (1,0,F) /* sampler message description, (binding_table,sampler_index,datatype)
/* here(src->dst) we should use src_sampler and src_surface */
mlen 5 rlen 8 { align1 }; /* required message len 5, readback len 8 */
diff --git a/src/render_program/exa_wm_src_sample_argb.g4b b/src/render_program/exa_wm_src_sample_argb.g4b
index c5b9274..a15e40a 100644
--- a/src/render_program/exa_wm_src_sample_argb.g4b
+++ b/src/render_program/exa_wm_src_sample_argb.g4b
@@ -1,2 +1,3 @@
{ 0x00000201, 0x20080061, 0x00000000, 0x00000000 },
- { 0x01800031, 0x21c01d29, 0x008d0000, 0x02580001 },
+ { 0x00600001, 0x20200022, 0x008d0000, 0x00000000 },
+ { 0x01800031, 0x21c01c09, 0x00000000, 0x02580001 },
diff --git a/src/render_program/exa_wm_src_sample_argb.g4b.gen5 b/src/render_program/exa_wm_src_sample_argb.g4b.gen5
index f8cb41e..42039af 100644
--- a/src/render_program/exa_wm_src_sample_argb.g4b.gen5
+++ b/src/render_program/exa_wm_src_sample_argb.g4b.gen5
@@ -1,2 +1,3 @@
{ 0x00000201, 0x20080061, 0x00000000, 0x00000000 },
- { 0x01800031, 0x21c01d29, 0x208d0000, 0x0a8a0001 },
+ { 0x00600001, 0x20200022, 0x008d0000, 0x00000000 },
+ { 0x01800031, 0x21c01c09, 0x20000000, 0x0a8a0001 },
diff --git a/src/render_program/exa_wm_src_sample_planar.g4a b/src/render_program/exa_wm_src_sample_planar.g4a
index ad33350..5f5520b 100644
--- a/src/render_program/exa_wm_src_sample_planar.g4a
+++ b/src/render_program/exa_wm_src_sample_planar.g4a
@@ -41,9 +41,10 @@ mov (1) g0.8<1>UD 0x0000e000UD { align1 mask_disable };
/* emit sampler 'send' cmd */
/* sample Y */
+mov (8) src_msg<1>UD g0<8,8,1>UD { align1 }; /* copy to msg start reg*/
send (16) src_msg_ind /* msg reg index */
src_sample_g<1>UW /* readback */
- g0<8,8,1>UW /* copy to msg start reg*/
+ null
sampler (1,0,F) /* sampler message description, (binding_table,sampler_index,datatype)
/* here(src->dst) we should use src_sampler and src_surface */
mlen 5 rlen 2 { align1 }; /* required message len 5, readback len 8 */
@@ -51,7 +52,7 @@ send (16) src_msg_ind /* msg reg index */
/* sample U (Cr) */
send (16) src_msg_ind /* msg reg index */
src_sample_r<1>UW /* readback */
- g0<8,8,1>UW /* copy to msg start reg*/
+ null
sampler (3,0,F) /* sampler message description, (binding_table,sampler_index,datatype)
/* here(src->dst) we should use src_sampler and src_surface */
mlen 5 rlen 2 { align1 }; /* required message len 5, readback len 8 */
@@ -59,7 +60,7 @@ send (16) src_msg_ind /* msg reg index */
/* sample V (Cb) */
send (16) src_msg_ind /* msg reg index */
src_sample_b<1>UW /* readback */
- g0<8,8,1>UW /* copy to msg start reg*/
+ null
sampler (5,0,F) /* sampler message description, (binding_table,sampler_index,datatype)
/* here(src->dst) we should use src_sampler and src_surface */
mlen 5 rlen 2 { align1 }; /* required message len 5, readback len 8 */
diff --git a/src/render_program/exa_wm_src_sample_planar.g4b b/src/render_program/exa_wm_src_sample_planar.g4b
index 23e5e0d..c8dc47d 100644
--- a/src/render_program/exa_wm_src_sample_planar.g4b
+++ b/src/render_program/exa_wm_src_sample_planar.g4b
@@ -1,4 +1,5 @@
{ 0x00000201, 0x20080061, 0x00000000, 0x0000e000 },
- { 0x01800031, 0x22001d29, 0x008d0000, 0x02520001 },
- { 0x01800031, 0x21c01d29, 0x008d0000, 0x02520003 },
- { 0x01800031, 0x22401d29, 0x008d0000, 0x02520005 },
+ { 0x00600001, 0x20200022, 0x008d0000, 0x00000000 },
+ { 0x01800031, 0x22001c09, 0x00000000, 0x02520001 },
+ { 0x01800031, 0x21c01c09, 0x00000000, 0x02520003 },
+ { 0x01800031, 0x22401c09, 0x00000000, 0x02520005 },
diff --git a/src/render_program/exa_wm_src_sample_planar.g4b.gen5 b/src/render_program/exa_wm_src_sample_planar.g4b.gen5
index 71068d9..ce3670b 100644
--- a/src/render_program/exa_wm_src_sample_planar.g4b.gen5
+++ b/src/render_program/exa_wm_src_sample_planar.g4b.gen5
@@ -1,4 +1,5 @@
{ 0x00000201, 0x20080061, 0x00000000, 0x0000e000 },
- { 0x01800031, 0x22001d29, 0x208d0000, 0x0a2a0001 },
- { 0x01800031, 0x21c01d29, 0x208d0000, 0x0a2a0003 },
- { 0x01800031, 0x22401d29, 0x208d0000, 0x0a2a0005 },
+ { 0x00600001, 0x20200022, 0x008d0000, 0x00000000 },
+ { 0x01800031, 0x22001c09, 0x20000000, 0x0a2a0001 },
+ { 0x01800031, 0x21c01c09, 0x20000000, 0x0a2a0003 },
+ { 0x01800031, 0x22401c09, 0x20000000, 0x0a2a0005 },
--
1.7.0.4
next prev parent reply other threads:[~2010-10-21 8:57 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2010-10-21 8:55 Xv on Sandybridge Xiang, Haihao
2010-10-21 8:55 ` [PATCH 1/6] Xv: set the surface state base address Xiang, Haihao
2010-10-21 8:55 ` Xiang, Haihao [this message]
2010-10-21 8:55 ` [PATCH 3/6] Xv: fragments for xv on Sandybridge Xiang, Haihao
2010-10-21 8:55 ` [PATCH 4/6] Xv: setup pipeline for Xv " Xiang, Haihao
2010-10-21 8:55 ` [PATCH 5/6] Xv: enable TextureAdaptor for Sandybridge Xiang, Haihao
2010-10-21 8:55 ` [PATCH 6/6] Xv: don't call intel_wait_for_scanline on Sandybridge Xiang, Haihao
2010-10-21 9:31 ` Xv " Chris Wilson
2010-10-22 1:40 ` Xiang, Haihao
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