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From: Eric Anholt <eric@anholt.net>
To: intel-gfx@lists.freedesktop.org
Subject: [PATCH 2/2] drm/i915: Fix missed interrupts on gen6 blit ring by holding FORCEWAKE up.
Date: Wed,  1 Jun 2011 17:41:23 -0700	[thread overview]
Message-ID: <1306975283-14238-2-git-send-email-eric@anholt.net> (raw)
In-Reply-To: <1306975283-14238-1-git-send-email-eric@anholt.net>

Before this patch, I was experiencing missed IRQs (hang, then dmesg
saying IRQ missed, then continuing) when running piglit
copypixels-sync about 0.5% of the time (no single run series I've done
so far got beyond 400 consecutive successes).  With this patch, I'm over
3200 consecutive successes with no missed IRQs.

---

This patch seems like a pretty clear indication that our understanding
of what requires FORCEWAKE is incorrect.  The only other patch I got
to succeed like this one was when I just left BLT IRQs on forever.

Can anyone cite where 0x40000 came from?

 drivers/gpu/drm/i915/intel_ringbuffer.c |    4 ++++
 1 files changed, 4 insertions(+), 0 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
index c6c4d23..ef22e9b 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.c
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
@@ -631,9 +631,11 @@ gen6_ring_get_irq(struct intel_ring_buffer *ring, u32 rflag)
 
 	spin_lock(&ring->irq_lock);
 	if (ring->irq_refcount++ == 0) {
+		gen6_gt_force_wake_get(dev_priv);
 		ring->irq_mask &= ~rflag;
 		I915_WRITE_IMR(ring, ring->irq_mask);
 		POSTING_READ(RING_IMR(ring->mmio_base));
+		gen6_gt_force_wake_put(dev_priv);
 	}
 	spin_unlock(&ring->irq_lock);
 
@@ -648,9 +650,11 @@ gen6_ring_put_irq(struct intel_ring_buffer *ring, u32 rflag)
 
 	spin_lock(&ring->irq_lock);
 	if (--ring->irq_refcount == 0) {
+		gen6_gt_force_wake_get(dev_priv);
 		ring->irq_mask |= rflag;
 		I915_WRITE_IMR(ring, ring->irq_mask);
 		POSTING_READ(RING_IMR(ring->mmio_base));
+		gen6_gt_force_wake_put(dev_priv);
 	}
 	spin_unlock(&ring->irq_lock);
 }
-- 
1.7.5.1

      reply	other threads:[~2011-06-02  0:41 UTC|newest]

Thread overview: 2+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2011-06-02  0:41 [PATCH 1/2] drm/i915: Control gen6 ring interrupts through a single mask field Eric Anholt
2011-06-02  0:41 ` Eric Anholt [this message]

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