From: ville.syrjala@linux.intel.com
To: intel-gfx@lists.freedesktop.org
Subject: [PATCH 08/11] drm/i915: Bad pixel formats can't reach the sprite code
Date: Wed, 31 Oct 2012 17:50:21 +0200 [thread overview]
Message-ID: <1351698624-26626-9-git-send-email-ville.syrjala@linux.intel.com> (raw)
In-Reply-To: <1351698624-26626-1-git-send-email-ville.syrjala@linux.intel.com>
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
The framebuffer pixel format is already checked by the common code.
So there's no way an invalid format could reach the driver. So instead
of falling back to a default format, call BUG().
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/intel_sprite.c | 8 ++------
1 files changed, 2 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_sprite.c b/drivers/gpu/drm/i915/intel_sprite.c
index a4fe7f5..7959e75 100644
--- a/drivers/gpu/drm/i915/intel_sprite.c
+++ b/drivers/gpu/drm/i915/intel_sprite.c
@@ -78,9 +78,7 @@ ivb_update_plane(struct drm_plane *plane, struct drm_framebuffer *fb,
sprctl |= SPRITE_FORMAT_YUV422 | SPRITE_YUV_ORDER_VYUY;
break;
default:
- DRM_DEBUG_DRIVER("bad pixel format, assuming RGBX888\n");
- sprctl |= SPRITE_FORMAT_RGBX888;
- break;
+ BUG();
}
if (obj->tiling_mode != I915_TILING_NONE)
@@ -252,9 +250,7 @@ ilk_update_plane(struct drm_plane *plane, struct drm_framebuffer *fb,
dvscntr |= DVS_FORMAT_YUV422 | DVS_YUV_ORDER_VYUY;
break;
default:
- DRM_DEBUG_DRIVER("bad pixel format, assuming RGBX888\n");
- dvscntr |= DVS_FORMAT_RGBX888;
- break;
+ BUG();
}
if (obj->tiling_mode != I915_TILING_NONE)
--
1.7.8.6
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next prev parent reply other threads:[~2012-10-31 15:51 UTC|newest]
Thread overview: 35+ messages / expand[flat|nested] mbox.gz Atom feed top
2012-10-31 15:50 [PATCH 00/11] drm/i915: Patches cherry-picked from drm_atomic ville.syrjala
2012-10-31 15:50 ` [PATCH 01/11] drm/i915: Fix display pixel format handling ville.syrjala
2012-10-31 20:20 ` Jesse Barnes
2012-11-01 14:03 ` Ville Syrjälä
2012-11-01 14:06 ` Chris Wilson
2012-10-31 15:50 ` [PATCH 02/11] drm/i915: Add SURFLIVE register definitions ville.syrjala
2012-10-31 20:23 ` Jesse Barnes
2012-10-31 22:57 ` Daniel Vetter
2012-11-01 14:16 ` Ville Syrjälä
2012-11-01 14:19 ` Daniel Vetter
2012-11-01 14:23 ` Ville Syrjälä
2012-10-31 15:50 ` [PATCH 03/11] drm/i915: Implement execbuffer wait for all planes ville.syrjala
2012-10-31 15:59 ` Chris Wilson
2012-10-31 15:50 ` [PATCH 04/11] drm/i915: Factor out i9xx_compute_clocks() like ironlake_compute_clocks() ville.syrjala
2012-10-31 16:28 ` Daniel Vetter
2012-10-31 17:04 ` Ville Syrjälä
2012-10-31 18:29 ` Daniel Vetter
2012-10-31 15:50 ` [PATCH 05/11] drm/i915: Check framebuffer stride more thoroughly ville.syrjala
2012-10-31 20:25 ` Jesse Barnes
2012-11-01 14:06 ` Ville Syrjälä
2012-10-31 15:50 ` [PATCH 06/11] drm/i915: Check the framebuffer offset ville.syrjala
2012-10-31 20:26 ` Jesse Barnes
2012-11-01 14:09 ` Ville Syrjälä
2012-11-01 14:18 ` Daniel Vetter
2012-11-01 14:40 ` Jesse Barnes
2012-11-01 14:40 ` Ville Syrjälä
2012-10-31 15:50 ` [PATCH 07/11] drm/i915: pixel_size == cpp ville.syrjala
2012-10-31 20:27 ` Jesse Barnes
2012-10-31 15:50 ` ville.syrjala [this message]
2012-10-31 20:27 ` [PATCH 08/11] drm/i915: Bad pixel formats can't reach the sprite code Jesse Barnes
2012-10-31 15:50 ` [PATCH 09/11] drm/i915: Consitify adjusted_mode parameter ville.syrjala
2012-10-31 15:50 ` [PATCH 10/11] drm/i915: Constify mode argument to intel_modeset_adjusted_mode() ville.syrjala
2012-10-31 15:50 ` [PATCH 11/11] drm/i915: Introduce intel_crtc_update_sarea_pos() ville.syrjala
2012-10-31 20:27 ` Jesse Barnes
2012-10-31 23:02 ` Daniel Vetter
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