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From: Damien Lespiau <damien.lespiau@gmail.com>
To: intel-gfx@lists.freedesktop.org
Subject: [PATCH] drm/i915: Only check for valid PP_{ON, OFF}_DELAYS on pre ILK hardware
Date: Wed, 31 Oct 2012 19:23:16 +0000	[thread overview]
Message-ID: <1351711396-6373-1-git-send-email-damien.lespiau@gmail.com> (raw)

From: Damien Lespiau <damien.lespiau@intel.com>

ILK+ have this register on the PCH. This check was triggering unclaimed
writes.

Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
---
 drivers/gpu/drm/i915/intel_bios.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/intel_bios.c b/drivers/gpu/drm/i915/intel_bios.c
index 0ed6baf..87e9b92 100644
--- a/drivers/gpu/drm/i915/intel_bios.c
+++ b/drivers/gpu/drm/i915/intel_bios.c
@@ -762,7 +762,8 @@ void intel_setup_bios(struct drm_device *dev)
 	struct drm_i915_private *dev_priv = dev->dev_private;
 
 	 /* Set the Panel Power On/Off timings if uninitialized. */
-	if ((I915_READ(PP_ON_DELAYS) == 0) && (I915_READ(PP_OFF_DELAYS) == 0)) {
+	if (!HAS_PCH_SPLIT(dev) &&
+	    I915_READ(PP_ON_DELAYS) == 0 && I915_READ(PP_OFF_DELAYS) == 0) {
 		/* Set T2 to 40ms and T5 to 200ms */
 		I915_WRITE(PP_ON_DELAYS, 0x019007d0);
 
-- 
1.7.11.7

             reply	other threads:[~2012-10-31 19:23 UTC|newest]

Thread overview: 5+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2012-10-31 19:23 Damien Lespiau [this message]
2012-11-01 15:52 ` [PATCH] drm/i915: Only check for valid PP_{ON, OFF}_DELAYS on pre ILK hardware Paulo Zanoni
2012-11-01 16:24   ` Daniel Vetter
2012-11-15 14:33     ` Paulo Zanoni
2012-11-15 14:42       ` Daniel Vetter

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