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From: Paulo Zanoni <przanoni@gmail.com>
To: intel-gfx@lists.freedesktop.org
Cc: Paulo Zanoni <paulo.r.zanoni@intel.com>
Subject: [PATCH 01/36] drm/i915: don't set ADPA pipe select on LPT
Date: Wed, 31 Oct 2012 18:12:20 -0200	[thread overview]
Message-ID: <1351714375-15284-2-git-send-email-przanoni@gmail.com> (raw)
In-Reply-To: <1351714375-15284-1-git-send-email-przanoni@gmail.com>

From: Paulo Zanoni <paulo.r.zanoni@intel.com>

Those bits just don't exist on LPT. The CRT DAC, PCH transcoder and
FDI RX are always connected to DDI E.

Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
---
 drivers/gpu/drm/i915/intel_crt.c | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/intel_crt.c b/drivers/gpu/drm/i915/intel_crt.c
index 5f7c414..e4fd102 100644
--- a/drivers/gpu/drm/i915/intel_crt.c
+++ b/drivers/gpu/drm/i915/intel_crt.c
@@ -245,7 +245,9 @@ static void intel_crt_mode_set(struct drm_encoder *encoder,
 		adpa |= ADPA_VSYNC_ACTIVE_HIGH;
 
 	/* For CPT allow 3 pipe config, for others just use A or B */
-	if (HAS_PCH_CPT(dev))
+	if (HAS_PCH_LPT(dev))
+		; /* Those bits don't exist here */
+	else if (HAS_PCH_CPT(dev))
 		adpa |= PORT_TRANS_SEL_CPT(intel_crtc->pipe);
 	else if (intel_crtc->pipe == 0)
 		adpa |= ADPA_PIPE_A_SELECT;
-- 
1.7.11.4

  reply	other threads:[~2012-10-31 20:13 UTC|newest]

Thread overview: 51+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2012-10-31 20:12 [PATCH 00/36] Haswell VGA fixes Paulo Zanoni
2012-10-31 20:12 ` Paulo Zanoni [this message]
2012-10-31 20:12 ` [PATCH 02/36] drm/i915: use intel_ddi_get_hw_state on CRT encoder too Paulo Zanoni
2012-10-31 20:12 ` [PATCH 03/36] drm/i915: add lpt_pch_enable Paulo Zanoni
2012-10-31 20:12 ` [PATCH 04/36] drm/i915: remove Haswell/LPT bits from ironlake_pch_enable Paulo Zanoni
2012-10-31 20:12 ` [PATCH 05/36] drm/i915: remove ironlake bits from lpt_pch_enable Paulo Zanoni
2012-10-31 20:12 ` [PATCH 06/36] drm/i915: train Haswell FDI at the right time Paulo Zanoni
2012-11-01 15:07   ` Daniel Vetter
2012-10-31 20:12 ` [PATCH 07/36] drm/i915: use the right FDI_RX_CTL register on Haswell Paulo Zanoni
2012-11-01 15:09   ` Daniel Vetter
2012-11-01 16:47     ` Paulo Zanoni
2012-10-31 20:12 ` [PATCH 08/36] drm/i915: set the correct number of FDI lanes " Paulo Zanoni
2012-10-31 20:12 ` [PATCH 09/36] drm/i915: don't rely on DDI_BUF_CTL previous values Paulo Zanoni
2012-10-31 20:12 ` [PATCH 10/36] drm/i915: program the FDI RX TUSIZE register on hsw_fdi_link_train Paulo Zanoni
2012-11-01 15:13   ` Daniel Vetter
2012-10-31 20:12 ` [PATCH 11/36] drm/i915: properly program FDI_RX_MISC pwrdn lane values on HSW Paulo Zanoni
2012-11-01 15:15   ` Daniel Vetter
2012-10-31 20:12 ` [PATCH 12/36] drm/i915: wait only 35us for the FDI link training Paulo Zanoni
2012-10-31 20:12 ` [PATCH 13/36] drm/i915: remove an useless indentation level on hsw_fdi_link_train Paulo Zanoni
2012-10-31 20:12 ` [PATCH 14/36] drm/i915: disable FDI_RX_ENABLE, not FDI_RX_PLL_ENABLE Paulo Zanoni
2012-10-31 20:12 ` [PATCH 15/36] drm/i915: change Haswell FDI link training error messages Paulo Zanoni
2012-10-31 20:12 ` [PATCH 16/36] drm/i915: try each voltage twice at hsw_fdi_link_train Paulo Zanoni
2012-11-01 15:16   ` Daniel Vetter
2012-10-31 20:12 ` [PATCH 17/36] drm/i915: fix Haswell FDI link disable path Paulo Zanoni
2012-10-31 20:12 ` [PATCH 18/36] drm/i915: don't write FDI_RX_TUSIZE on lpt_pch_enable Paulo Zanoni
2012-11-01 15:21   ` Daniel Vetter
2012-10-31 20:12 ` [PATCH 19/36] drm/i915: rename intel_enable_pch_pll to ironlake_enable_pch_pll Paulo Zanoni
2012-11-01 15:40   ` Daniel Vetter
2012-10-31 20:12 ` [PATCH 20/36] drm/i915: don't call ironlake_enable_pch_pll on lpt_pch_enable Paulo Zanoni
2012-10-31 20:12 ` [PATCH 21/36] drm/i915: don't assert_panel_unlocked on LPT Paulo Zanoni
2012-10-31 20:12 ` [PATCH 22/36] drm/i915: use the CPU and PCH transcoders on lpt_pch_enable Paulo Zanoni
2012-10-31 20:12 ` [PATCH 23/36] drm/i915: rename intel_{en, dis}able_transcoder Paulo Zanoni
2012-10-31 20:12 ` [PATCH 24/36] drm/i915: fork lpt version of ironlake_{en, dis}able_pch_transcoder Paulo Zanoni
2012-10-31 20:12 ` [PATCH 25/36] drm/i915: remove Haswell code from ironlake_enable_pch_transcoder Paulo Zanoni
2012-10-31 20:12 ` [PATCH 26/36] drm/i915: remove IBX code from lpt_enable_pch_transcoder Paulo Zanoni
2012-10-31 20:12 ` [PATCH 27/36] drm/i915: don't assert_pch_pll_enabled on lpt_enable_pch_transcoder Paulo Zanoni
2012-11-01 16:07   ` Daniel Vetter
2012-10-31 20:12 ` [PATCH 28/36] drm/i915: use CPU and PCH transcoders " Paulo Zanoni
2012-10-31 20:12 ` [PATCH 29/36] drm/i915: use PIPECONF_INTERLACE_MASK_HSW " Paulo Zanoni
2012-11-01 16:16   ` Daniel Vetter
2012-11-01 16:53     ` Paulo Zanoni
2012-11-01 19:59       ` Daniel Vetter
2012-10-31 20:12 ` [PATCH 30/36] drm/i915: don't rely on previous values when setting LPT TRANSCONF Paulo Zanoni
2012-10-31 20:12 ` [PATCH 31/36] drm/i915: don't assert_pch_ports_disabled on LPT Paulo Zanoni
2012-11-01 16:21   ` Daniel Vetter
2012-10-31 20:12 ` [PATCH 32/36] drm/i915: use CPU and PCH transcoders on lpt_disable_pch_transcoder Paulo Zanoni
2012-10-31 20:12 ` [PATCH 33/36] drm/i915: implement timing override workarounds on LPT Paulo Zanoni
2012-10-31 20:12 ` [PATCH 34/36] drm/i915: don't intel_disable_pch_pll on Haswell/LPT Paulo Zanoni
2012-10-31 20:12 ` [PATCH 35/36] drm/i915: don't limit Haswell CRT encoder to pipe A Paulo Zanoni
2012-10-31 20:12 ` [PATCH 36/36] drm/i915: don't assert disabled FDI before disabling the FDI Paulo Zanoni
2012-11-01 21:09   ` Daniel Vetter

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