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From: Daniel Vetter <daniel.vetter@ffwll.ch>
To: Intel Graphics Development <intel-gfx@lists.freedesktop.org>
Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
Subject: [PATCH 2/5] drm/i915: drop unnecessary check from fdi_link_train code
Date: Wed, 31 Oct 2012 22:52:28 +0100	[thread overview]
Message-ID: <1351720351-2688-3-git-send-email-daniel.vetter@ffwll.ch> (raw)
In-Reply-To: <1351720351-2688-1-git-send-email-daniel.vetter@ffwll.ch>

They are all written for a specific north disaplay->pch combination.
So stop pretending otherwise.

Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
---
 drivers/gpu/drm/i915/intel_display.c | 14 +++++---------
 1 file changed, 5 insertions(+), 9 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 3b62999..129059b 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -2409,11 +2409,9 @@ static void ironlake_fdi_link_train(struct drm_crtc *crtc)
 	udelay(150);
 
 	/* Ironlake workaround, enable clock pointer after FDI enable*/
-	if (HAS_PCH_IBX(dev)) {
-		I915_WRITE(FDI_RX_CHICKEN(pipe), FDI_RX_PHASE_SYNC_POINTER_OVR);
-		I915_WRITE(FDI_RX_CHICKEN(pipe), FDI_RX_PHASE_SYNC_POINTER_OVR |
-			   FDI_RX_PHASE_SYNC_POINTER_EN);
-	}
+	I915_WRITE(FDI_RX_CHICKEN(pipe), FDI_RX_PHASE_SYNC_POINTER_OVR);
+	I915_WRITE(FDI_RX_CHICKEN(pipe), FDI_RX_PHASE_SYNC_POINTER_OVR |
+		   FDI_RX_PHASE_SYNC_POINTER_EN);
 
 	reg = FDI_RX_IIR(pipe);
 	for (tries = 0; tries < 5; tries++) {
@@ -2519,8 +2517,7 @@ static void gen6_fdi_link_train(struct drm_crtc *crtc)
 	POSTING_READ(reg);
 	udelay(150);
 
-	if (HAS_PCH_CPT(dev))
-		cpt_phase_pointer_enable(dev, pipe);
+	cpt_phase_pointer_enable(dev, pipe);
 
 	for (i = 0; i < 4; i++) {
 		reg = FDI_TX_CTL(pipe);
@@ -2654,8 +2651,7 @@ static void ivb_manual_fdi_link_train(struct drm_crtc *crtc)
 	POSTING_READ(reg);
 	udelay(150);
 
-	if (HAS_PCH_CPT(dev))
-		cpt_phase_pointer_enable(dev, pipe);
+	cpt_phase_pointer_enable(dev, pipe);
 
 	for (i = 0; i < 4; i++) {
 		reg = FDI_TX_CTL(pipe);
-- 
1.7.11.4

  parent reply	other threads:[~2012-10-31 21:52 UTC|newest]

Thread overview: 17+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2012-10-31 21:52 [PATCH 0/5] ivb fdi b/c fixes Daniel Vetter
2012-10-31 21:52 ` [PATCH 1/5] drm/i915: check whether the pch is the soulmate of the cpu Daniel Vetter
2012-11-01 15:58   ` Paulo Zanoni
2012-10-31 21:52 ` Daniel Vetter [this message]
2012-10-31 21:52 ` [PATCH 3/5] drm/i915: CPT/PPT pch transcoder workaround Daniel Vetter
2012-11-01  8:15   ` [PATCH] drm/i915: CPT/PPT pch dp " Daniel Vetter
2012-11-01 14:37     ` Jesse Barnes
2012-11-01 15:33       ` Daniel Vetter
2012-11-01 15:35         ` Jesse Barnes
2012-11-01 16:12     ` Paulo Zanoni
2012-10-31 21:52 ` [PATCH 4/5] drm/i915: implement WADP0ClockGatingDisable Daniel Vetter
2012-11-01 16:18   ` Paulo Zanoni
2012-10-31 21:52 ` [PATCH 5/5] drm/i915: kill pch_init_clock_gating indirection Daniel Vetter
2012-11-01 16:35   ` Paulo Zanoni
2012-11-01 22:03     ` Daniel Vetter
  -- strict thread matches above, loose matches on Subject: below --
2012-10-29 22:23 [PATCH 1/5] drm/i915: check whether the pch is the soulmate of the cpu Daniel Vetter
2012-10-29 22:23 ` [PATCH 2/5] drm/i915: drop unnecessary check from fdi_link_train code Daniel Vetter
2012-10-31 17:27   ` Paulo Zanoni

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