From: "Xiang, Haihao" <haihao.xiang@intel.com>
To: intel-gfx@lists.freedesktop.org
Subject: [PATCH 2/2] Update gem_ring_sync_loop to support VEBOX ring (the 4th ring) on Haswell
Date: Wed, 14 Nov 2012 12:55:56 +0800 [thread overview]
Message-ID: <1352868956-19533-3-git-send-email-haihao.xiang@intel.com> (raw)
In-Reply-To: <1352868956-19533-1-git-send-email-haihao.xiang@intel.com>
From: "Xiang, Haihao" <haihao.xiang@intel.com>
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
---
tests/gem_ring_sync_loop.c | 18 +++++++++++++++---
1 file changed, 15 insertions(+), 3 deletions(-)
diff --git a/tests/gem_ring_sync_loop.c b/tests/gem_ring_sync_loop.c
index b689bcd..199dcfd 100644
--- a/tests/gem_ring_sync_loop.c
+++ b/tests/gem_ring_sync_loop.c
@@ -56,14 +56,26 @@ static drm_intel_bo *target_buffer;
#define MI_DO_COMPARE (1<<21)
static void
-store_dword_loop(void)
+store_dword_loop(int devid)
{
int i;
+ int num_rings = 3;
srandom(0xdeadbeef);
+ if (IS_HASWELL(devid))
+ num_rings = 4;
+ else if (IS_IVYBRIDGE(devid) || IS_GEN6(devid))
+ num_rings = 3;
+ else if (IS_GEN5(devid) || IS_G4X(devid))
+ num_rings = 2;
+ else
+ num_rings = 1;
+
+ fprintf(stderr, "The number of rings: %d\n", num_rings);
+
for (i = 0; i < 0x100000; i++) {
- int ring = random() % 3 + 1;
+ int ring = random() % num_rings + 1;
if (ring == I915_EXEC_RENDER) {
BEGIN_BATCH(4);
@@ -127,7 +139,7 @@ int main(int argc, char **argv)
exit(-1);
}
- store_dword_loop();
+ store_dword_loop(devid);
drm_intel_bo_unreference(target_buffer);
intel_batchbuffer_free(batch);
--
1.7.9.5
next prev parent reply other threads:[~2012-11-14 5:03 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2012-11-14 4:55 [PATCH 0/2] test cases for the new ring on Haswell Xiang, Haihao
2012-11-14 4:55 ` [PATCH 1/2] tests: storedw on VEBOX Xiang, Haihao
2012-11-14 4:55 ` Xiang, Haihao [this message]
2012-11-14 8:23 ` [PATCH 0/2] test cases for the new ring on Haswell Chris Wilson
2012-11-15 8:05 ` Xiang, Haihao
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