From: Damien Lespiau <damien.lespiau@intel.com>
To: intel-gfx@lists.freedesktop.org
Subject: [PATCH 21/90] assembler: Remove trailing white space from brw_defines.h
Date: Mon, 4 Feb 2013 15:27:16 +0000 [thread overview]
Message-ID: <1359991705-5254-22-git-send-email-damien.lespiau@intel.com> (raw)
In-Reply-To: <1359991705-5254-1-git-send-email-damien.lespiau@intel.com>
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
---
assembler/brw_defines.h | 296 +++++++++++++++++++++++-----------------------
1 files changed, 148 insertions(+), 148 deletions(-)
diff --git a/assembler/brw_defines.h b/assembler/brw_defines.h
index f0b358e..23402e3 100644
--- a/assembler/brw_defines.h
+++ b/assembler/brw_defines.h
@@ -2,7 +2,7 @@
Copyright (C) Intel Corp. 2006. All Rights Reserved.
Intel funded Tungsten Graphics (http://www.tungstengraphics.com) to
develop this 3D driver.
-
+
Permission is hereby granted, free of charge, to any person obtaining
a copy of this software and associated documentation files (the
"Software"), to deal in the Software without restriction, including
@@ -10,11 +10,11 @@
distribute, sublicense, and/or sell copies of the Software, and to
permit persons to whom the Software is furnished to do so, subject to
the following conditions:
-
+
The above copyright notice and this permission notice (including the
next paragraph) shall be included in all copies or substantial
portions of the Software.
-
+
THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
@@ -22,7 +22,7 @@
LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
-
+
**********************************************************************/
/*
* Authors:
@@ -77,13 +77,13 @@
#define _3DPRIM_LINESTRIP_CONT_BF 0x14
#define _3DPRIM_TRIFAN_NOSTIPPLE 0x15
-#define BRW_ANISORATIO_2 0
-#define BRW_ANISORATIO_4 1
-#define BRW_ANISORATIO_6 2
-#define BRW_ANISORATIO_8 3
-#define BRW_ANISORATIO_10 4
-#define BRW_ANISORATIO_12 5
-#define BRW_ANISORATIO_14 6
+#define BRW_ANISORATIO_2 0
+#define BRW_ANISORATIO_4 1
+#define BRW_ANISORATIO_6 2
+#define BRW_ANISORATIO_8 3
+#define BRW_ANISORATIO_10 4
+#define BRW_ANISORATIO_12 5
+#define BRW_ANISORATIO_14 6
#define BRW_ANISORATIO_16 7
#define BRW_BLENDFACTOR_ONE 0x1
@@ -188,14 +188,14 @@
#define BRW_LOGICOPFUNCTION_COPY 12
#define BRW_LOGICOPFUNCTION_OR_REVERSE 13
#define BRW_LOGICOPFUNCTION_OR 14
-#define BRW_LOGICOPFUNCTION_SET 15
+#define BRW_LOGICOPFUNCTION_SET 15
-#define BRW_MAPFILTER_NEAREST 0x0
-#define BRW_MAPFILTER_LINEAR 0x1
+#define BRW_MAPFILTER_NEAREST 0x0
+#define BRW_MAPFILTER_LINEAR 0x1
#define BRW_MAPFILTER_ANISOTROPIC 0x2
-#define BRW_MIPFILTER_NONE 0
-#define BRW_MIPFILTER_NEAREST 1
+#define BRW_MIPFILTER_NONE 0
+#define BRW_MIPFILTER_NEAREST 1
#define BRW_MIPFILTER_LINEAR 3
#define BRW_ADDRESS_ROUNDING_ENABLE_U_MAG 0x20
@@ -208,7 +208,7 @@
#define BRW_POLYGON_FRONT_FACING 0
#define BRW_POLYGON_BACK_FACING 1
-#define BRW_PREFILTER_ALWAYS 0x0
+#define BRW_PREFILTER_ALWAYS 0x0
#define BRW_PREFILTER_NEVER 0x1
#define BRW_PREFILTER_LESS 0x2
#define BRW_PREFILTER_EQUAL 0x3
@@ -218,10 +218,10 @@
#define BRW_PREFILTER_GEQUAL 0x7
#define BRW_PROVOKING_VERTEX_0 0
-#define BRW_PROVOKING_VERTEX_1 1
+#define BRW_PROVOKING_VERTEX_1 1
#define BRW_PROVOKING_VERTEX_2 2
-#define BRW_RASTRULE_UPPER_LEFT 0
+#define BRW_RASTRULE_UPPER_LEFT 0
#define BRW_RASTRULE_UPPER_RIGHT 1
/* These are listed as "Reserved, but not seen as useful"
* in Intel documentation (page 212, "Point Rasterization Rule",
@@ -229,7 +229,7 @@
* "Intel® 965 Express Chipset Family and Intel® G35 Express
* Chipset Graphics Controller Programmer's Reference Manual,
* Volume 2: 3D/Media", Revision 1.0b as of January 2008,
- * available at
+ * available at
* http://intellinuxgraphics.org/documentation.html
* at the time of this writing).
*
@@ -267,88 +267,88 @@
#define BRW_SURFACE_WRITEDISABLE_R_SHIFT 16
#define BRW_SURFACE_WRITEDISABLE_A_SHIFT 17
-#define BRW_SURFACEFORMAT_R32G32B32A32_FLOAT 0x000
-#define BRW_SURFACEFORMAT_R32G32B32A32_SINT 0x001
-#define BRW_SURFACEFORMAT_R32G32B32A32_UINT 0x002
-#define BRW_SURFACEFORMAT_R32G32B32A32_UNORM 0x003
-#define BRW_SURFACEFORMAT_R32G32B32A32_SNORM 0x004
-#define BRW_SURFACEFORMAT_R64G64_FLOAT 0x005
-#define BRW_SURFACEFORMAT_R32G32B32X32_FLOAT 0x006
+#define BRW_SURFACEFORMAT_R32G32B32A32_FLOAT 0x000
+#define BRW_SURFACEFORMAT_R32G32B32A32_SINT 0x001
+#define BRW_SURFACEFORMAT_R32G32B32A32_UINT 0x002
+#define BRW_SURFACEFORMAT_R32G32B32A32_UNORM 0x003
+#define BRW_SURFACEFORMAT_R32G32B32A32_SNORM 0x004
+#define BRW_SURFACEFORMAT_R64G64_FLOAT 0x005
+#define BRW_SURFACEFORMAT_R32G32B32X32_FLOAT 0x006
#define BRW_SURFACEFORMAT_R32G32B32A32_SSCALED 0x007
#define BRW_SURFACEFORMAT_R32G32B32A32_USCALED 0x008
#define BRW_SURFACEFORMAT_R32G32B32A32_SFIXED 0x020
-#define BRW_SURFACEFORMAT_R32G32B32_FLOAT 0x040
-#define BRW_SURFACEFORMAT_R32G32B32_SINT 0x041
-#define BRW_SURFACEFORMAT_R32G32B32_UINT 0x042
-#define BRW_SURFACEFORMAT_R32G32B32_UNORM 0x043
-#define BRW_SURFACEFORMAT_R32G32B32_SNORM 0x044
-#define BRW_SURFACEFORMAT_R32G32B32_SSCALED 0x045
-#define BRW_SURFACEFORMAT_R32G32B32_USCALED 0x046
+#define BRW_SURFACEFORMAT_R32G32B32_FLOAT 0x040
+#define BRW_SURFACEFORMAT_R32G32B32_SINT 0x041
+#define BRW_SURFACEFORMAT_R32G32B32_UINT 0x042
+#define BRW_SURFACEFORMAT_R32G32B32_UNORM 0x043
+#define BRW_SURFACEFORMAT_R32G32B32_SNORM 0x044
+#define BRW_SURFACEFORMAT_R32G32B32_SSCALED 0x045
+#define BRW_SURFACEFORMAT_R32G32B32_USCALED 0x046
#define BRW_SURFACEFORMAT_R32G32B32_SFIXED 0x050
-#define BRW_SURFACEFORMAT_R16G16B16A16_UNORM 0x080
-#define BRW_SURFACEFORMAT_R16G16B16A16_SNORM 0x081
-#define BRW_SURFACEFORMAT_R16G16B16A16_SINT 0x082
-#define BRW_SURFACEFORMAT_R16G16B16A16_UINT 0x083
-#define BRW_SURFACEFORMAT_R16G16B16A16_FLOAT 0x084
-#define BRW_SURFACEFORMAT_R32G32_FLOAT 0x085
-#define BRW_SURFACEFORMAT_R32G32_SINT 0x086
-#define BRW_SURFACEFORMAT_R32G32_UINT 0x087
-#define BRW_SURFACEFORMAT_R32_FLOAT_X8X24_TYPELESS 0x088
-#define BRW_SURFACEFORMAT_X32_TYPELESS_G8X24_UINT 0x089
-#define BRW_SURFACEFORMAT_L32A32_FLOAT 0x08A
-#define BRW_SURFACEFORMAT_R32G32_UNORM 0x08B
-#define BRW_SURFACEFORMAT_R32G32_SNORM 0x08C
-#define BRW_SURFACEFORMAT_R64_FLOAT 0x08D
-#define BRW_SURFACEFORMAT_R16G16B16X16_UNORM 0x08E
-#define BRW_SURFACEFORMAT_R16G16B16X16_FLOAT 0x08F
-#define BRW_SURFACEFORMAT_A32X32_FLOAT 0x090
-#define BRW_SURFACEFORMAT_L32X32_FLOAT 0x091
-#define BRW_SURFACEFORMAT_I32X32_FLOAT 0x092
+#define BRW_SURFACEFORMAT_R16G16B16A16_UNORM 0x080
+#define BRW_SURFACEFORMAT_R16G16B16A16_SNORM 0x081
+#define BRW_SURFACEFORMAT_R16G16B16A16_SINT 0x082
+#define BRW_SURFACEFORMAT_R16G16B16A16_UINT 0x083
+#define BRW_SURFACEFORMAT_R16G16B16A16_FLOAT 0x084
+#define BRW_SURFACEFORMAT_R32G32_FLOAT 0x085
+#define BRW_SURFACEFORMAT_R32G32_SINT 0x086
+#define BRW_SURFACEFORMAT_R32G32_UINT 0x087
+#define BRW_SURFACEFORMAT_R32_FLOAT_X8X24_TYPELESS 0x088
+#define BRW_SURFACEFORMAT_X32_TYPELESS_G8X24_UINT 0x089
+#define BRW_SURFACEFORMAT_L32A32_FLOAT 0x08A
+#define BRW_SURFACEFORMAT_R32G32_UNORM 0x08B
+#define BRW_SURFACEFORMAT_R32G32_SNORM 0x08C
+#define BRW_SURFACEFORMAT_R64_FLOAT 0x08D
+#define BRW_SURFACEFORMAT_R16G16B16X16_UNORM 0x08E
+#define BRW_SURFACEFORMAT_R16G16B16X16_FLOAT 0x08F
+#define BRW_SURFACEFORMAT_A32X32_FLOAT 0x090
+#define BRW_SURFACEFORMAT_L32X32_FLOAT 0x091
+#define BRW_SURFACEFORMAT_I32X32_FLOAT 0x092
#define BRW_SURFACEFORMAT_R16G16B16A16_SSCALED 0x093
#define BRW_SURFACEFORMAT_R16G16B16A16_USCALED 0x094
#define BRW_SURFACEFORMAT_R32G32_SSCALED 0x095
#define BRW_SURFACEFORMAT_R32G32_USCALED 0x096
#define BRW_SURFACEFORMAT_R32G32_SFIXED 0x0A0
-#define BRW_SURFACEFORMAT_B8G8R8A8_UNORM 0x0C0
-#define BRW_SURFACEFORMAT_B8G8R8A8_UNORM_SRGB 0x0C1
-#define BRW_SURFACEFORMAT_R10G10B10A2_UNORM 0x0C2
-#define BRW_SURFACEFORMAT_R10G10B10A2_UNORM_SRGB 0x0C3
-#define BRW_SURFACEFORMAT_R10G10B10A2_UINT 0x0C4
-#define BRW_SURFACEFORMAT_R10G10B10_SNORM_A2_UNORM 0x0C5
-#define BRW_SURFACEFORMAT_R8G8B8A8_UNORM 0x0C7
-#define BRW_SURFACEFORMAT_R8G8B8A8_UNORM_SRGB 0x0C8
-#define BRW_SURFACEFORMAT_R8G8B8A8_SNORM 0x0C9
-#define BRW_SURFACEFORMAT_R8G8B8A8_SINT 0x0CA
-#define BRW_SURFACEFORMAT_R8G8B8A8_UINT 0x0CB
-#define BRW_SURFACEFORMAT_R16G16_UNORM 0x0CC
-#define BRW_SURFACEFORMAT_R16G16_SNORM 0x0CD
-#define BRW_SURFACEFORMAT_R16G16_SINT 0x0CE
-#define BRW_SURFACEFORMAT_R16G16_UINT 0x0CF
-#define BRW_SURFACEFORMAT_R16G16_FLOAT 0x0D0
-#define BRW_SURFACEFORMAT_B10G10R10A2_UNORM 0x0D1
-#define BRW_SURFACEFORMAT_B10G10R10A2_UNORM_SRGB 0x0D2
-#define BRW_SURFACEFORMAT_R11G11B10_FLOAT 0x0D3
-#define BRW_SURFACEFORMAT_R32_SINT 0x0D6
-#define BRW_SURFACEFORMAT_R32_UINT 0x0D7
-#define BRW_SURFACEFORMAT_R32_FLOAT 0x0D8
-#define BRW_SURFACEFORMAT_R24_UNORM_X8_TYPELESS 0x0D9
-#define BRW_SURFACEFORMAT_X24_TYPELESS_G8_UINT 0x0DA
-#define BRW_SURFACEFORMAT_L16A16_UNORM 0x0DF
-#define BRW_SURFACEFORMAT_I24X8_UNORM 0x0E0
-#define BRW_SURFACEFORMAT_L24X8_UNORM 0x0E1
-#define BRW_SURFACEFORMAT_A24X8_UNORM 0x0E2
-#define BRW_SURFACEFORMAT_I32_FLOAT 0x0E3
-#define BRW_SURFACEFORMAT_L32_FLOAT 0x0E4
-#define BRW_SURFACEFORMAT_A32_FLOAT 0x0E5
-#define BRW_SURFACEFORMAT_B8G8R8X8_UNORM 0x0E9
-#define BRW_SURFACEFORMAT_B8G8R8X8_UNORM_SRGB 0x0EA
-#define BRW_SURFACEFORMAT_R8G8B8X8_UNORM 0x0EB
-#define BRW_SURFACEFORMAT_R8G8B8X8_UNORM_SRGB 0x0EC
-#define BRW_SURFACEFORMAT_R9G9B9E5_SHAREDEXP 0x0ED
-#define BRW_SURFACEFORMAT_B10G10R10X2_UNORM 0x0EE
-#define BRW_SURFACEFORMAT_L16A16_FLOAT 0x0F0
-#define BRW_SURFACEFORMAT_R32_UNORM 0x0F1
-#define BRW_SURFACEFORMAT_R32_SNORM 0x0F2
+#define BRW_SURFACEFORMAT_B8G8R8A8_UNORM 0x0C0
+#define BRW_SURFACEFORMAT_B8G8R8A8_UNORM_SRGB 0x0C1
+#define BRW_SURFACEFORMAT_R10G10B10A2_UNORM 0x0C2
+#define BRW_SURFACEFORMAT_R10G10B10A2_UNORM_SRGB 0x0C3
+#define BRW_SURFACEFORMAT_R10G10B10A2_UINT 0x0C4
+#define BRW_SURFACEFORMAT_R10G10B10_SNORM_A2_UNORM 0x0C5
+#define BRW_SURFACEFORMAT_R8G8B8A8_UNORM 0x0C7
+#define BRW_SURFACEFORMAT_R8G8B8A8_UNORM_SRGB 0x0C8
+#define BRW_SURFACEFORMAT_R8G8B8A8_SNORM 0x0C9
+#define BRW_SURFACEFORMAT_R8G8B8A8_SINT 0x0CA
+#define BRW_SURFACEFORMAT_R8G8B8A8_UINT 0x0CB
+#define BRW_SURFACEFORMAT_R16G16_UNORM 0x0CC
+#define BRW_SURFACEFORMAT_R16G16_SNORM 0x0CD
+#define BRW_SURFACEFORMAT_R16G16_SINT 0x0CE
+#define BRW_SURFACEFORMAT_R16G16_UINT 0x0CF
+#define BRW_SURFACEFORMAT_R16G16_FLOAT 0x0D0
+#define BRW_SURFACEFORMAT_B10G10R10A2_UNORM 0x0D1
+#define BRW_SURFACEFORMAT_B10G10R10A2_UNORM_SRGB 0x0D2
+#define BRW_SURFACEFORMAT_R11G11B10_FLOAT 0x0D3
+#define BRW_SURFACEFORMAT_R32_SINT 0x0D6
+#define BRW_SURFACEFORMAT_R32_UINT 0x0D7
+#define BRW_SURFACEFORMAT_R32_FLOAT 0x0D8
+#define BRW_SURFACEFORMAT_R24_UNORM_X8_TYPELESS 0x0D9
+#define BRW_SURFACEFORMAT_X24_TYPELESS_G8_UINT 0x0DA
+#define BRW_SURFACEFORMAT_L16A16_UNORM 0x0DF
+#define BRW_SURFACEFORMAT_I24X8_UNORM 0x0E0
+#define BRW_SURFACEFORMAT_L24X8_UNORM 0x0E1
+#define BRW_SURFACEFORMAT_A24X8_UNORM 0x0E2
+#define BRW_SURFACEFORMAT_I32_FLOAT 0x0E3
+#define BRW_SURFACEFORMAT_L32_FLOAT 0x0E4
+#define BRW_SURFACEFORMAT_A32_FLOAT 0x0E5
+#define BRW_SURFACEFORMAT_B8G8R8X8_UNORM 0x0E9
+#define BRW_SURFACEFORMAT_B8G8R8X8_UNORM_SRGB 0x0EA
+#define BRW_SURFACEFORMAT_R8G8B8X8_UNORM 0x0EB
+#define BRW_SURFACEFORMAT_R8G8B8X8_UNORM_SRGB 0x0EC
+#define BRW_SURFACEFORMAT_R9G9B9E5_SHAREDEXP 0x0ED
+#define BRW_SURFACEFORMAT_B10G10R10X2_UNORM 0x0EE
+#define BRW_SURFACEFORMAT_L16A16_FLOAT 0x0F0
+#define BRW_SURFACEFORMAT_R32_UNORM 0x0F1
+#define BRW_SURFACEFORMAT_R32_SNORM 0x0F2
#define BRW_SURFACEFORMAT_R10G10B10X2_USCALED 0x0F3
#define BRW_SURFACEFORMAT_R8G8B8A8_SSCALED 0x0F4
#define BRW_SURFACEFORMAT_R8G8B8A8_USCALED 0x0F5
@@ -356,25 +356,25 @@
#define BRW_SURFACEFORMAT_R16G16_USCALED 0x0F7
#define BRW_SURFACEFORMAT_R32_SSCALED 0x0F8
#define BRW_SURFACEFORMAT_R32_USCALED 0x0F9
-#define BRW_SURFACEFORMAT_B5G6R5_UNORM 0x100
-#define BRW_SURFACEFORMAT_B5G6R5_UNORM_SRGB 0x101
-#define BRW_SURFACEFORMAT_B5G5R5A1_UNORM 0x102
-#define BRW_SURFACEFORMAT_B5G5R5A1_UNORM_SRGB 0x103
-#define BRW_SURFACEFORMAT_B4G4R4A4_UNORM 0x104
-#define BRW_SURFACEFORMAT_B4G4R4A4_UNORM_SRGB 0x105
-#define BRW_SURFACEFORMAT_R8G8_UNORM 0x106
-#define BRW_SURFACEFORMAT_R8G8_SNORM 0x107
-#define BRW_SURFACEFORMAT_R8G8_SINT 0x108
-#define BRW_SURFACEFORMAT_R8G8_UINT 0x109
-#define BRW_SURFACEFORMAT_R16_UNORM 0x10A
-#define BRW_SURFACEFORMAT_R16_SNORM 0x10B
-#define BRW_SURFACEFORMAT_R16_SINT 0x10C
-#define BRW_SURFACEFORMAT_R16_UINT 0x10D
-#define BRW_SURFACEFORMAT_R16_FLOAT 0x10E
-#define BRW_SURFACEFORMAT_I16_UNORM 0x111
-#define BRW_SURFACEFORMAT_L16_UNORM 0x112
-#define BRW_SURFACEFORMAT_A16_UNORM 0x113
-#define BRW_SURFACEFORMAT_L8A8_UNORM 0x114
+#define BRW_SURFACEFORMAT_B5G6R5_UNORM 0x100
+#define BRW_SURFACEFORMAT_B5G6R5_UNORM_SRGB 0x101
+#define BRW_SURFACEFORMAT_B5G5R5A1_UNORM 0x102
+#define BRW_SURFACEFORMAT_B5G5R5A1_UNORM_SRGB 0x103
+#define BRW_SURFACEFORMAT_B4G4R4A4_UNORM 0x104
+#define BRW_SURFACEFORMAT_B4G4R4A4_UNORM_SRGB 0x105
+#define BRW_SURFACEFORMAT_R8G8_UNORM 0x106
+#define BRW_SURFACEFORMAT_R8G8_SNORM 0x107
+#define BRW_SURFACEFORMAT_R8G8_SINT 0x108
+#define BRW_SURFACEFORMAT_R8G8_UINT 0x109
+#define BRW_SURFACEFORMAT_R16_UNORM 0x10A
+#define BRW_SURFACEFORMAT_R16_SNORM 0x10B
+#define BRW_SURFACEFORMAT_R16_SINT 0x10C
+#define BRW_SURFACEFORMAT_R16_UINT 0x10D
+#define BRW_SURFACEFORMAT_R16_FLOAT 0x10E
+#define BRW_SURFACEFORMAT_I16_UNORM 0x111
+#define BRW_SURFACEFORMAT_L16_UNORM 0x112
+#define BRW_SURFACEFORMAT_A16_UNORM 0x113
+#define BRW_SURFACEFORMAT_L8A8_UNORM 0x114
#define BRW_SURFACEFORMAT_I16_FLOAT 0x115
#define BRW_SURFACEFORMAT_L16_FLOAT 0x116
#define BRW_SURFACEFORMAT_A16_FLOAT 0x117
@@ -386,46 +386,46 @@
#define BRW_SURFACEFORMAT_R8G8_USCALED 0x11D
#define BRW_SURFACEFORMAT_R16_SSCALED 0x11E
#define BRW_SURFACEFORMAT_R16_USCALED 0x11F
-#define BRW_SURFACEFORMAT_R8_UNORM 0x140
-#define BRW_SURFACEFORMAT_R8_SNORM 0x141
-#define BRW_SURFACEFORMAT_R8_SINT 0x142
-#define BRW_SURFACEFORMAT_R8_UINT 0x143
-#define BRW_SURFACEFORMAT_A8_UNORM 0x144
-#define BRW_SURFACEFORMAT_I8_UNORM 0x145
-#define BRW_SURFACEFORMAT_L8_UNORM 0x146
-#define BRW_SURFACEFORMAT_P4A4_UNORM 0x147
+#define BRW_SURFACEFORMAT_R8_UNORM 0x140
+#define BRW_SURFACEFORMAT_R8_SNORM 0x141
+#define BRW_SURFACEFORMAT_R8_SINT 0x142
+#define BRW_SURFACEFORMAT_R8_UINT 0x143
+#define BRW_SURFACEFORMAT_A8_UNORM 0x144
+#define BRW_SURFACEFORMAT_I8_UNORM 0x145
+#define BRW_SURFACEFORMAT_L8_UNORM 0x146
+#define BRW_SURFACEFORMAT_P4A4_UNORM 0x147
#define BRW_SURFACEFORMAT_A4P4_UNORM 0x148
#define BRW_SURFACEFORMAT_R8_SSCALED 0x149
#define BRW_SURFACEFORMAT_R8_USCALED 0x14A
#define BRW_SURFACEFORMAT_L8_UNORM_SRGB 0x14C
#define BRW_SURFACEFORMAT_DXT1_RGB_SRGB 0x180
-#define BRW_SURFACEFORMAT_R1_UINT 0x181
-#define BRW_SURFACEFORMAT_YCRCB_NORMAL 0x182
-#define BRW_SURFACEFORMAT_YCRCB_SWAPUVY 0x183
-#define BRW_SURFACEFORMAT_BC1_UNORM 0x186
-#define BRW_SURFACEFORMAT_BC2_UNORM 0x187
-#define BRW_SURFACEFORMAT_BC3_UNORM 0x188
-#define BRW_SURFACEFORMAT_BC4_UNORM 0x189
-#define BRW_SURFACEFORMAT_BC5_UNORM 0x18A
-#define BRW_SURFACEFORMAT_BC1_UNORM_SRGB 0x18B
-#define BRW_SURFACEFORMAT_BC2_UNORM_SRGB 0x18C
-#define BRW_SURFACEFORMAT_BC3_UNORM_SRGB 0x18D
-#define BRW_SURFACEFORMAT_MONO8 0x18E
-#define BRW_SURFACEFORMAT_YCRCB_SWAPUV 0x18F
-#define BRW_SURFACEFORMAT_YCRCB_SWAPY 0x190
-#define BRW_SURFACEFORMAT_DXT1_RGB 0x191
-#define BRW_SURFACEFORMAT_FXT1 0x192
-#define BRW_SURFACEFORMAT_R8G8B8_UNORM 0x193
-#define BRW_SURFACEFORMAT_R8G8B8_SNORM 0x194
-#define BRW_SURFACEFORMAT_R8G8B8_SSCALED 0x195
-#define BRW_SURFACEFORMAT_R8G8B8_USCALED 0x196
-#define BRW_SURFACEFORMAT_R64G64B64A64_FLOAT 0x197
-#define BRW_SURFACEFORMAT_R64G64B64_FLOAT 0x198
-#define BRW_SURFACEFORMAT_BC4_SNORM 0x199
-#define BRW_SURFACEFORMAT_BC5_SNORM 0x19A
-#define BRW_SURFACEFORMAT_R16G16B16_UNORM 0x19C
-#define BRW_SURFACEFORMAT_R16G16B16_SNORM 0x19D
-#define BRW_SURFACEFORMAT_R16G16B16_SSCALED 0x19E
+#define BRW_SURFACEFORMAT_R1_UINT 0x181
+#define BRW_SURFACEFORMAT_YCRCB_NORMAL 0x182
+#define BRW_SURFACEFORMAT_YCRCB_SWAPUVY 0x183
+#define BRW_SURFACEFORMAT_BC1_UNORM 0x186
+#define BRW_SURFACEFORMAT_BC2_UNORM 0x187
+#define BRW_SURFACEFORMAT_BC3_UNORM 0x188
+#define BRW_SURFACEFORMAT_BC4_UNORM 0x189
+#define BRW_SURFACEFORMAT_BC5_UNORM 0x18A
+#define BRW_SURFACEFORMAT_BC1_UNORM_SRGB 0x18B
+#define BRW_SURFACEFORMAT_BC2_UNORM_SRGB 0x18C
+#define BRW_SURFACEFORMAT_BC3_UNORM_SRGB 0x18D
+#define BRW_SURFACEFORMAT_MONO8 0x18E
+#define BRW_SURFACEFORMAT_YCRCB_SWAPUV 0x18F
+#define BRW_SURFACEFORMAT_YCRCB_SWAPY 0x190
+#define BRW_SURFACEFORMAT_DXT1_RGB 0x191
+#define BRW_SURFACEFORMAT_FXT1 0x192
+#define BRW_SURFACEFORMAT_R8G8B8_UNORM 0x193
+#define BRW_SURFACEFORMAT_R8G8B8_SNORM 0x194
+#define BRW_SURFACEFORMAT_R8G8B8_SSCALED 0x195
+#define BRW_SURFACEFORMAT_R8G8B8_USCALED 0x196
+#define BRW_SURFACEFORMAT_R64G64B64A64_FLOAT 0x197
+#define BRW_SURFACEFORMAT_R64G64B64_FLOAT 0x198
+#define BRW_SURFACEFORMAT_BC4_SNORM 0x199
+#define BRW_SURFACEFORMAT_BC5_SNORM 0x19A
+#define BRW_SURFACEFORMAT_R16G16B16_UNORM 0x19C
+#define BRW_SURFACEFORMAT_R16G16B16_SNORM 0x19D
+#define BRW_SURFACEFORMAT_R16G16B16_SSCALED 0x19E
#define BRW_SURFACEFORMAT_R16G16B16_USCALED 0x19F
#define BRW_SURFACEFORMAT_R32_SFIXED 0x1B2
#define BRW_SURFACEFORMAT_R10G10B10A2_SNORM 0x1B3
@@ -787,7 +787,7 @@ enum opcode {
#define BRW_ARF_NULL 0x00
#define BRW_ARF_ADDRESS 0x10
-#define BRW_ARF_ACCUMULATOR 0x20
+#define BRW_ARF_ACCUMULATOR 0x20
#define BRW_ARF_FLAG 0x30
#define BRW_ARF_MASK 0x40
#define BRW_ARF_MASK_STACK 0x50
--
1.7.7.5
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next prev parent reply other threads:[~2013-02-04 15:29 UTC|newest]
Thread overview: 93+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-02-04 15:26 Sync the assembler with Mesa's opcode emission code Damien Lespiau
2013-02-04 15:26 ` [PATCH 01/90] build: Add CAIRO_FLAGS to the debugger compilation Damien Lespiau
2013-02-04 15:26 ` [PATCH 02/90] gitignore: Ignore TAGS files Damien Lespiau
2013-02-04 15:26 ` [PATCH 03/90] build: Don't use AM_MAINTAINER_MODE Damien Lespiau
2013-02-04 15:26 ` [PATCH 04/90] build: Only build the assembler if flex and bison are found Damien Lespiau
2013-02-04 15:27 ` [PATCH 05/90] build: Add the debugger compilation status to the summary Damien Lespiau
2013-02-04 15:27 ` [PATCH 06/90] assembler: Sync brw_instruction's header with mesa's Damien Lespiau
2013-02-04 15:27 ` [PATCH 07/90] assembler: Rename three_src_gen6 to da3src Damien Lespiau
2013-02-04 15:27 ` [PATCH 08/90] assembler: Rename dp_read_gen6 to gen6_dp_sampler_const_cache Damien Lespiau
2013-02-04 15:27 ` [PATCH 09/90] assembler: Rename dp_gen6 to gen6_dp and sync with Mesa's Damien Lespiau
2013-02-04 15:27 ` [PATCH 10/90] assembler: Rename dp_gen7 to gen7_dp and sync it " Damien Lespiau
2013-02-04 15:27 ` [PATCH 11/90] assembler: Remove struct dp_write_gen6 and struct use gen6_dp Damien Lespiau
2013-02-04 15:27 ` [PATCH 12/90] assembler: Rename gen5 DP pixel_scoreboard_clear to last_render_target Damien Lespiau
2013-02-04 15:27 ` [PATCH 13/90] assembler: Rename branch to branch_gen6 Damien Lespiau
2013-02-04 15:27 ` [PATCH 14/90] assembler: Rename branch_2_offset to break_cont Damien Lespiau
2013-02-04 15:27 ` [PATCH 15/90] assembler: Rename bits3.id and bits3.fd Damien Lespiau
2013-02-04 15:27 ` [PATCH 16/90] assembler: Adopt brw_structs.h from mesa Damien Lespiau
2013-02-04 15:27 ` [PATCH 17/90] assembler: Remove trailing white spaces from brw_structs.h Damien Lespiau
2013-02-04 15:27 ` [PATCH 18/90] assembler: Adopt enum brw_message_target from mesa Damien Lespiau
2013-02-04 15:27 ` [PATCH 19/90] assembler: Rename BRW_ACCWRCTRL_ACCWRCTRL Damien Lespiau
2013-02-04 15:27 ` [PATCH 20/90] assembler: Import brw_defines.h from Mesa Damien Lespiau
2013-02-04 15:27 ` Damien Lespiau [this message]
2013-02-04 15:27 ` [PATCH 22/90] assembler: Update the disassembler code Damien Lespiau
2013-02-04 15:27 ` [PATCH 23/90] assembler: Import ralloc from Mesa Damien Lespiau
2013-02-04 15:27 ` [PATCH 24/90] assembler: Remove white space from brw_eu.h Damien Lespiau
2013-02-04 15:27 ` [PATCH 25/90] assembler: Introduce struct brw_context Damien Lespiau
2013-02-04 15:27 ` [PATCH 26/90] assembler: Make an libbrw library Damien Lespiau
2013-02-04 15:27 ` [PATCH 27/90] assembler: Protect gen4asm.h from multiple inclusions Damien Lespiau
2013-02-04 15:27 ` [PATCH 28/90] assembler: Import brw_eu_compact.c Damien Lespiau
2013-02-04 15:27 ` [PATCH 29/90] assembler: Import brw_eu.c Damien Lespiau
2013-02-04 15:27 ` [PATCH 30/90] assembler: Don't use -Wpointer-arith Damien Lespiau
2013-02-04 15:27 ` [PATCH 31/90] assembler: Import brw_eu_emit.c Damien Lespiau
2013-02-04 15:27 ` [PATCH 32/90] assembler: Use BRW_WRITEMASK_XYZW instead of the 0xf constant Damien Lespiau
2013-02-04 15:27 ` [PATCH 33/90] assembler: Remove the writemask_set field of struct dest_operand Damien Lespiau
2013-02-04 15:27 ` [PATCH 34/90] assembler: Use subreg_nr to store the address register subreg Damien Lespiau
2013-02-04 15:27 ` [PATCH 35/90] assembler: Simplify get_subreg_address() Damien Lespiau
2013-02-04 15:27 ` [PATCH 36/90] assembler: Make print_instruction() take an instruction Damien Lespiau
2013-02-04 15:27 ` [PATCH 37/90] assembler: Refactor the code adding instructions and labels Damien Lespiau
2013-02-04 15:27 ` [PATCH 38/90] assembler: Make explicit that labels are part of the instructions list Damien Lespiau
2013-02-04 15:27 ` [PATCH 39/90] assembler: Don't change the size of opcodes! Damien Lespiau
2013-02-04 15:27 ` [PATCH 40/90] assembler: Make sure nobody adds a field back to struct brw_instruction Damien Lespiau
2013-02-04 15:27 ` [PATCH 41/90] assembler: Don't expose functions only used in main.c Damien Lespiau
2013-02-04 15:27 ` [PATCH 42/90] assembler: Make struct declared_register use struct brw_reg Damien Lespiau
2013-02-04 15:27 ` [PATCH 43/90] assembler: Replace struct direct_reg by " Damien Lespiau
2013-02-04 15:27 ` [PATCH 44/90] assembler: Replace struct indirect_reg " Damien Lespiau
2013-02-04 15:27 ` [PATCH 45/90] assembler: Unify the direct and indirect register type Damien Lespiau
2013-02-04 15:27 ` [PATCH 46/90] assembler: Replace struct dst_operand by struct brw_reg Damien Lespiau
2013-02-04 15:27 ` [PATCH 47/90] assembler: Consolidate the swizzling configuration on 8 bits Damien Lespiau
2013-02-04 15:27 ` [PATCH 48/90] assembler: Get rid of src operand's swizzle_set Damien Lespiau
2013-02-04 15:27 ` [PATCH 49/90] assembler: Use brw_reg in the source operand Damien Lespiau
2013-02-04 15:27 ` [PATCH 50/90] assembler: Factor out the destination register validation Damien Lespiau
2013-02-04 15:27 ` [PATCH 51/90] assembler: Use brw_set_dest() to encode the destination Damien Lespiau
2013-02-04 15:27 ` [PATCH 52/90] assembler: Factor out the source register validation Damien Lespiau
2013-02-04 15:27 ` [PATCH 53/90] assembler: ExecSize can be as big as 32 channels Damien Lespiau
2013-02-04 15:27 ` [PATCH 54/90] assembler: Fix comparisons between reg.type and Architecture registers Damien Lespiau
2013-02-04 15:27 ` [PATCH 55/90] assembler: Store immediate values in reg.dw1.ud Damien Lespiau
2013-02-04 15:27 ` [PATCH 56/90] assembler: Don't warn if identical declared registers are redefined Damien Lespiau
2013-02-04 15:27 ` [PATCH 57/90] assembler: Add location support Damien Lespiau
2013-02-04 15:27 ` [PATCH 58/90] assembler: Add error() and warn() shorthands and use them in set_src[01] Damien Lespiau
2013-02-04 15:27 ` [PATCH 59/90] assembler: Add a check for when width is 1 and hstride is not 0 Damien Lespiau
2013-02-04 15:27 ` [PATCH 60/90] assembler: Add a check for when ExecSize and width are 1 Damien Lespiau
2013-02-04 15:27 ` [PATCH 61/90] assembler: Add the input filename to the error/warning messages Damien Lespiau
2013-02-04 15:27 ` [PATCH 62/90] assembler: Use brw_set_src0() Damien Lespiau
2013-02-04 15:27 ` [PATCH 63/90] assembler: Port the warning and error reporting to warn()/error() Damien Lespiau
2013-02-04 15:27 ` [PATCH 64/90] assembler: Cleanup visibility of a few global variables/functions Damien Lespiau
2013-02-04 15:28 ` [PATCH 65/90] assembler: Fix ')' placement in condition Damien Lespiau
2013-02-04 15:28 ` [PATCH 66/90] assembler: Implement register-indirect addressing mode in brw_set_src1() Damien Lespiau
2013-02-04 15:28 ` [PATCH 67/90] assembler: Use brw_set_src1() Damien Lespiau
2013-02-04 15:28 ` [PATCH 68/90] assembler: Renamed the instruction field to insn Damien Lespiau
2013-02-04 15:28 ` [PATCH 69/90] assembler: Unify all instructions to be brw_program_instructions Damien Lespiau
2013-02-04 15:28 ` [PATCH 70/90] assembler: Move struct relocation out of relocatable instructions Damien Lespiau
2013-02-04 15:28 ` [PATCH 71/90] assembler: Gather all predicate data in its own structure Damien Lespiau
2013-02-04 15:28 ` [PATCH 72/90] assembler: Unify adding options to the header Damien Lespiau
2013-02-04 15:28 ` [PATCH 73/90] assembler: Isolate all the options in their own structure Damien Lespiau
2013-02-04 15:28 ` [PATCH 74/90] assembler: Introduce set_instruction_opcode() Damien Lespiau
2013-02-04 15:28 ` [PATCH 75/90] assembler: Introduce set_intruction_pred_cond() Damien Lespiau
2013-02-04 15:28 ` [PATCH 76/90] assembler: Introduce set_instruction_saturate() Damien Lespiau
2013-02-04 15:28 ` [PATCH 77/90] assembler: Expose setters for 3src operands Damien Lespiau
2013-02-04 15:28 ` [PATCH 78/90] assembler: Add support for D and UD in 3-src instructions Damien Lespiau
2013-02-04 15:28 ` [PATCH 79/90] assembler: Use brw_*() functions for " Damien Lespiau
2013-02-04 15:28 ` [PATCH 80/90] assembler: Don't pollute the library files with gen4asm.h Damien Lespiau
2013-02-04 15:28 ` [PATCH 81/90] assembler: Put struct opcode_desc back in brw_context.h Damien Lespiau
2013-02-04 15:28 ` [PATCH 82/90] assembler: Use set_instruction_src1() in send Damien Lespiau
2013-02-04 15:28 ` [PATCH 83/90] assembler: Finish importing brw_eu_*c from mesa Damien Lespiau
2013-02-04 15:28 ` [PATCH 84/90] assembler: Merge declared_register's type into the reg structure Damien Lespiau
2013-02-04 15:28 ` [PATCH 85/90] assembler: Use defines for width Damien Lespiau
2013-02-04 15:28 ` [PATCH 86/90] assembler: Remove trailing white space Damien Lespiau
2013-02-04 15:28 ` [PATCH 87/90] assembler: Don't use GL types Damien Lespiau
2013-02-04 15:28 ` [PATCH 88/90] assembler: Group the header inclusions together Damien Lespiau
2013-02-04 15:28 ` [PATCH 89/90] assembler: Fix the decoding of the destination horizontal stride Damien Lespiau
2013-02-04 15:28 ` [PATCH 90/90] assembler: Mark format() as PRINTFLIKE in the disassembler Damien Lespiau
2013-02-14 19:18 ` Sync the assembler with Mesa's opcode emission code Damien Lespiau
2013-03-04 16:38 ` Damien Lespiau
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