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From: Girish K S <girishks2000@gmail.com>
To: spi-devel-general@lists.sourceforge.net, linux-kernel@vger.kernel.org
Cc: linux-arm-kernel@lists.infradead.org, grant.likely@secretlab.ca,
	t.figa@samsung.com, broonie@opensource.wolfsonmicro.com
Subject: [PATCH V2 5/5] spi: s3c64xx: Added support for exynos5440 spi
Date: Wed, 13 Feb 2013 11:25:31 -0800	[thread overview]
Message-ID: <1360783531-32654-6-git-send-email-ks.giri@samsung.com> (raw)
In-Reply-To: <1360783531-32654-1-git-send-email-ks.giri@samsung.com>

This patch adds support for the exynos5440 spi controller.
The integration of the spi IP in exynos5440 is different from
other SoC's. The I/O pins are no more configured via gpio, they
have dedicated pins.

Signed-off-by: Girish K S <ks.giri@samsung.com>
---
changes in v2:
		the fifo mask modified to 0x1ff

 drivers/spi/spi-s3c64xx.c |   12 ++++++++++++
 1 file changed, 12 insertions(+)

diff --git a/drivers/spi/spi-s3c64xx.c b/drivers/spi/spi-s3c64xx.c
index 15b7ee9..332a4df 100644
--- a/drivers/spi/spi-s3c64xx.c
+++ b/drivers/spi/spi-s3c64xx.c
@@ -1580,6 +1580,15 @@ static struct s3c64xx_spi_port_config exynos4_spi_port_config = {
 	.clk_from_cmu	= true,
 };
 
+static struct s3c64xx_spi_port_config exynos5440_spi_port_config = {
+	.fifo_lvl_mask	= { 0x1ff },
+	.rx_lvl_offset	= 15,
+	.tx_st_done	= 25,
+	.high_speed	= true,
+	.clk_from_cmu	= true,
+	.quirks		= S3C64XX_SPI_QUIRK_POLL,
+};
+
 static struct platform_device_id s3c64xx_spi_driver_ids[] = {
 	{
 		.name		= "s3c2443-spi",
@@ -1608,6 +1617,9 @@ static const struct of_device_id s3c64xx_spi_dt_match[] = {
 	{ .compatible = "samsung,exynos4210-spi",
 			.data = (void *)&exynos4_spi_port_config,
 	},
+	{ .compatible = "samsung,exynos5440-spi",
+			.data = (void *)&exynos5440_spi_port_config,
+	},
 	{ },
 };
 MODULE_DEVICE_TABLE(of, s3c64xx_spi_dt_match);
-- 
1.7.10.4


WARNING: multiple messages have this Message-ID (diff)
From: Girish K S <girishks2000-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
To: spi-devel-general-5NWGOfrQmneRv+LV9MX5uipxlwaOVQ5f@public.gmane.org,
	linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
Cc: t.figa-Sze3O3UU22JBDgjK7y7TUQ@public.gmane.org,
	broonie-yzvPICuk2AATkU/dhu1WVueM+bqZidxxQQ4Iyu8u01E@public.gmane.org,
	linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org
Subject: [PATCH V2 5/5] spi: s3c64xx: Added support for exynos5440 spi
Date: Wed, 13 Feb 2013 11:25:31 -0800	[thread overview]
Message-ID: <1360783531-32654-6-git-send-email-ks.giri@samsung.com> (raw)
In-Reply-To: <1360783531-32654-1-git-send-email-ks.giri-Sze3O3UU22JBDgjK7y7TUQ@public.gmane.org>

This patch adds support for the exynos5440 spi controller.
The integration of the spi IP in exynos5440 is different from
other SoC's. The I/O pins are no more configured via gpio, they
have dedicated pins.

Signed-off-by: Girish K S <ks.giri-Sze3O3UU22JBDgjK7y7TUQ@public.gmane.org>
---
changes in v2:
		the fifo mask modified to 0x1ff

 drivers/spi/spi-s3c64xx.c |   12 ++++++++++++
 1 file changed, 12 insertions(+)

diff --git a/drivers/spi/spi-s3c64xx.c b/drivers/spi/spi-s3c64xx.c
index 15b7ee9..332a4df 100644
--- a/drivers/spi/spi-s3c64xx.c
+++ b/drivers/spi/spi-s3c64xx.c
@@ -1580,6 +1580,15 @@ static struct s3c64xx_spi_port_config exynos4_spi_port_config = {
 	.clk_from_cmu	= true,
 };
 
+static struct s3c64xx_spi_port_config exynos5440_spi_port_config = {
+	.fifo_lvl_mask	= { 0x1ff },
+	.rx_lvl_offset	= 15,
+	.tx_st_done	= 25,
+	.high_speed	= true,
+	.clk_from_cmu	= true,
+	.quirks		= S3C64XX_SPI_QUIRK_POLL,
+};
+
 static struct platform_device_id s3c64xx_spi_driver_ids[] = {
 	{
 		.name		= "s3c2443-spi",
@@ -1608,6 +1617,9 @@ static const struct of_device_id s3c64xx_spi_dt_match[] = {
 	{ .compatible = "samsung,exynos4210-spi",
 			.data = (void *)&exynos4_spi_port_config,
 	},
+	{ .compatible = "samsung,exynos5440-spi",
+			.data = (void *)&exynos5440_spi_port_config,
+	},
 	{ },
 };
 MODULE_DEVICE_TABLE(of, s3c64xx_spi_dt_match);
-- 
1.7.10.4


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WARNING: multiple messages have this Message-ID (diff)
From: girishks2000@gmail.com (Girish K S)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH V2 5/5] spi: s3c64xx: Added support for exynos5440 spi
Date: Wed, 13 Feb 2013 11:25:31 -0800	[thread overview]
Message-ID: <1360783531-32654-6-git-send-email-ks.giri@samsung.com> (raw)
In-Reply-To: <1360783531-32654-1-git-send-email-ks.giri@samsung.com>

This patch adds support for the exynos5440 spi controller.
The integration of the spi IP in exynos5440 is different from
other SoC's. The I/O pins are no more configured via gpio, they
have dedicated pins.

Signed-off-by: Girish K S <ks.giri@samsung.com>
---
changes in v2:
		the fifo mask modified to 0x1ff

 drivers/spi/spi-s3c64xx.c |   12 ++++++++++++
 1 file changed, 12 insertions(+)

diff --git a/drivers/spi/spi-s3c64xx.c b/drivers/spi/spi-s3c64xx.c
index 15b7ee9..332a4df 100644
--- a/drivers/spi/spi-s3c64xx.c
+++ b/drivers/spi/spi-s3c64xx.c
@@ -1580,6 +1580,15 @@ static struct s3c64xx_spi_port_config exynos4_spi_port_config = {
 	.clk_from_cmu	= true,
 };
 
+static struct s3c64xx_spi_port_config exynos5440_spi_port_config = {
+	.fifo_lvl_mask	= { 0x1ff },
+	.rx_lvl_offset	= 15,
+	.tx_st_done	= 25,
+	.high_speed	= true,
+	.clk_from_cmu	= true,
+	.quirks		= S3C64XX_SPI_QUIRK_POLL,
+};
+
 static struct platform_device_id s3c64xx_spi_driver_ids[] = {
 	{
 		.name		= "s3c2443-spi",
@@ -1608,6 +1617,9 @@ static const struct of_device_id s3c64xx_spi_dt_match[] = {
 	{ .compatible = "samsung,exynos4210-spi",
 			.data = (void *)&exynos4_spi_port_config,
 	},
+	{ .compatible = "samsung,exynos5440-spi",
+			.data = (void *)&exynos5440_spi_port_config,
+	},
 	{ },
 };
 MODULE_DEVICE_TABLE(of, s3c64xx_spi_dt_match);
-- 
1.7.10.4

  parent reply	other threads:[~2013-02-13 19:27 UTC|newest]

Thread overview: 17+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2013-02-13 19:25 [PATCH V2 0/5] Add polling support for 64xx spi controller Girish K S
2013-02-13 19:25 ` Girish K S
2013-02-13 19:25 ` [PATCH V2 1/5] spi: s3c64xx: modified error interrupt handling and init Girish K S
2013-02-13 19:25   ` Girish K S
2013-02-13 19:25 ` [PATCH V2 2/5] spi: s3c64xx: added support for polling mode Girish K S
2013-02-13 19:25   ` Girish K S
2013-02-13 19:25   ` Girish K S
2013-02-13 19:25 ` [PATCH V2 3/5] spi: s3c64xx: Added provision for non-gpio i/o's Girish K S
2013-02-13 19:25   ` Girish K S
2013-02-13 19:25   ` Girish K S
2013-02-13 19:25 ` [PATCH V2 4/5] spi: s3c64xx: Added provision for dedicated cs pin Girish K S
2013-02-13 19:25   ` Girish K S
2013-02-13 19:25   ` Girish K S
2013-02-13 19:25 ` Girish K S [this message]
2013-02-13 19:25   ` [PATCH V2 5/5] spi: s3c64xx: Added support for exynos5440 spi Girish K S
2013-02-13 19:25   ` Girish K S
2013-02-13 20:03 [PATCH V2 0/5] Add polling support for 64xx spi controller Girish K S
     [not found] ` <1360785828-32767-1-git-send-email-ks.giri-Sze3O3UU22JBDgjK7y7TUQ@public.gmane.org>
2013-02-13 20:03   ` [PATCH V2 5/5] spi: s3c64xx: Added support for exynos5440 spi Girish K S

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