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From: Santosh Shilimkar <santosh.shilimkar@ti.com>
To: linux-omap@vger.kernel.org
Cc: khilman@deeprootsystems.com,
	linux-arm-kernel@lists.infradead.org,
	Santosh Shilimkar <santosh.shilimkar@ti.com>
Subject: [PATCH 02/15] ARM: OMAP5: PM: Update CPU context register offset
Date: Fri, 1 Mar 2013 17:40:51 +0530	[thread overview]
Message-ID: <1362139864-9233-3-git-send-email-santosh.shilimkar@ti.com> (raw)
In-Reply-To: <1362139864-9233-1-git-send-email-santosh.shilimkar@ti.com>

On OMAP5, RM_CPUi_CPUi_CONTEXT offset has changed. Update the code
so that same code works for OMAP4+ devices.

Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
---
 arch/arm/mach-omap2/omap-mpuss-lowpower.c |   13 +++++++++----
 1 file changed, 9 insertions(+), 4 deletions(-)

diff --git a/arch/arm/mach-omap2/omap-mpuss-lowpower.c b/arch/arm/mach-omap2/omap-mpuss-lowpower.c
index ee8a1e4..bcd2efb 100644
--- a/arch/arm/mach-omap2/omap-mpuss-lowpower.c
+++ b/arch/arm/mach-omap2/omap-mpuss-lowpower.c
@@ -56,6 +56,7 @@
 #include "omap4-sar-layout.h"
 #include "pm.h"
 #include "prcm_mpu44xx.h"
+#include "prcm_mpu54xx.h"
 #include "prminst44xx.h"
 #include "prcm44xx.h"
 #include "prm44xx.h"
@@ -83,6 +84,7 @@ extern void omap4_cpu_resume(void);
 static DEFINE_PER_CPU(struct omap4_cpu_pm_info, omap4_pm_info);
 static struct powerdomain *mpuss_pd;
 static void __iomem *sar_base;
+static u32 cpu_context_offset;
 
 static int default_finish_suspend(unsigned long cpu_state)
 {
@@ -186,14 +188,14 @@ static inline void cpu_clear_prev_logic_pwrst(unsigned int cpu_id)
 
 	if (cpu_id) {
 		reg = omap4_prcm_mpu_read_inst_reg(OMAP4430_PRCM_MPU_CPU1_INST,
-					OMAP4_RM_CPU1_CPU1_CONTEXT_OFFSET);
+					cpu_context_offset);
 		omap4_prcm_mpu_write_inst_reg(reg, OMAP4430_PRCM_MPU_CPU1_INST,
-					OMAP4_RM_CPU1_CPU1_CONTEXT_OFFSET);
+					cpu_context_offset);
 	} else {
 		reg = omap4_prcm_mpu_read_inst_reg(OMAP4430_PRCM_MPU_CPU0_INST,
-					OMAP4_RM_CPU0_CPU0_CONTEXT_OFFSET);
+					cpu_context_offset);
 		omap4_prcm_mpu_write_inst_reg(reg, OMAP4430_PRCM_MPU_CPU0_INST,
-					OMAP4_RM_CPU0_CPU0_CONTEXT_OFFSET);
+					cpu_context_offset);
 	}
 }
 
@@ -431,6 +433,9 @@ int __init omap4_mpuss_init(void)
 		omap_pm_ops.finish_suspend = omap4_finish_suspend;
 		omap_pm_ops.resume = omap4_cpu_resume;
 		omap_pm_ops.scu_prepare = scu_pwrst_prepare;
+		cpu_context_offset = OMAP4_RM_CPU0_CPU0_CONTEXT_OFFSET;
+	} else if (soc_is_omap54xx()) {
+		cpu_context_offset = OMAP54XX_RM_CPU0_CPU0_CONTEXT_OFFSET;
 	}
 
 	return 0;
-- 
1.7.9.5


WARNING: multiple messages have this Message-ID (diff)
From: santosh.shilimkar@ti.com (Santosh Shilimkar)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 02/15] ARM: OMAP5: PM: Update CPU context register offset
Date: Fri, 1 Mar 2013 17:40:51 +0530	[thread overview]
Message-ID: <1362139864-9233-3-git-send-email-santosh.shilimkar@ti.com> (raw)
In-Reply-To: <1362139864-9233-1-git-send-email-santosh.shilimkar@ti.com>

On OMAP5, RM_CPUi_CPUi_CONTEXT offset has changed. Update the code
so that same code works for OMAP4+ devices.

Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
---
 arch/arm/mach-omap2/omap-mpuss-lowpower.c |   13 +++++++++----
 1 file changed, 9 insertions(+), 4 deletions(-)

diff --git a/arch/arm/mach-omap2/omap-mpuss-lowpower.c b/arch/arm/mach-omap2/omap-mpuss-lowpower.c
index ee8a1e4..bcd2efb 100644
--- a/arch/arm/mach-omap2/omap-mpuss-lowpower.c
+++ b/arch/arm/mach-omap2/omap-mpuss-lowpower.c
@@ -56,6 +56,7 @@
 #include "omap4-sar-layout.h"
 #include "pm.h"
 #include "prcm_mpu44xx.h"
+#include "prcm_mpu54xx.h"
 #include "prminst44xx.h"
 #include "prcm44xx.h"
 #include "prm44xx.h"
@@ -83,6 +84,7 @@ extern void omap4_cpu_resume(void);
 static DEFINE_PER_CPU(struct omap4_cpu_pm_info, omap4_pm_info);
 static struct powerdomain *mpuss_pd;
 static void __iomem *sar_base;
+static u32 cpu_context_offset;
 
 static int default_finish_suspend(unsigned long cpu_state)
 {
@@ -186,14 +188,14 @@ static inline void cpu_clear_prev_logic_pwrst(unsigned int cpu_id)
 
 	if (cpu_id) {
 		reg = omap4_prcm_mpu_read_inst_reg(OMAP4430_PRCM_MPU_CPU1_INST,
-					OMAP4_RM_CPU1_CPU1_CONTEXT_OFFSET);
+					cpu_context_offset);
 		omap4_prcm_mpu_write_inst_reg(reg, OMAP4430_PRCM_MPU_CPU1_INST,
-					OMAP4_RM_CPU1_CPU1_CONTEXT_OFFSET);
+					cpu_context_offset);
 	} else {
 		reg = omap4_prcm_mpu_read_inst_reg(OMAP4430_PRCM_MPU_CPU0_INST,
-					OMAP4_RM_CPU0_CPU0_CONTEXT_OFFSET);
+					cpu_context_offset);
 		omap4_prcm_mpu_write_inst_reg(reg, OMAP4430_PRCM_MPU_CPU0_INST,
-					OMAP4_RM_CPU0_CPU0_CONTEXT_OFFSET);
+					cpu_context_offset);
 	}
 }
 
@@ -431,6 +433,9 @@ int __init omap4_mpuss_init(void)
 		omap_pm_ops.finish_suspend = omap4_finish_suspend;
 		omap_pm_ops.resume = omap4_cpu_resume;
 		omap_pm_ops.scu_prepare = scu_pwrst_prepare;
+		cpu_context_offset = OMAP4_RM_CPU0_CPU0_CONTEXT_OFFSET;
+	} else if (soc_is_omap54xx()) {
+		cpu_context_offset = OMAP54XX_RM_CPU0_CPU0_CONTEXT_OFFSET;
 	}
 
 	return 0;
-- 
1.7.9.5

  parent reply	other threads:[~2013-03-01 12:10 UTC|newest]

Thread overview: 100+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2013-03-01 12:10 [PATCH 00/15] ARM: OMAP5: PM: Add MPUSS suspend and CPUidle support Santosh Shilimkar
2013-03-01 12:10 ` Santosh Shilimkar
2013-03-01 12:10 ` [PATCH 01/15] ARM: OMAP4+: PM: Consolidate MPU subsystem PM code for re-use Santosh Shilimkar
2013-03-01 12:10   ` Santosh Shilimkar
2013-03-01 13:50   ` Nishanth Menon
2013-03-01 13:50     ` Nishanth Menon
2013-03-01 12:10 ` Santosh Shilimkar [this message]
2013-03-01 12:10   ` [PATCH 02/15] ARM: OMAP5: PM: Update CPU context register offset Santosh Shilimkar
2013-03-01 17:34   ` Nishanth Menon
2013-03-01 17:34     ` Nishanth Menon
2013-03-01 12:10 ` [PATCH 03/15] ARM: OMAP4+: PM: Consolidate and use OMAP4 PM code for OMAP5 Santosh Shilimkar
2013-03-01 12:10   ` Santosh Shilimkar
2013-03-01 17:43   ` Nishanth Menon
2013-03-01 17:43     ` Nishanth Menon
2013-03-02  5:43     ` Santosh Shilimkar
2013-03-02  5:43       ` Santosh Shilimkar
2013-03-04 18:21       ` Nishanth Menon
2013-03-04 18:21         ` Nishanth Menon
2013-03-01 12:10 ` [PATCH 04/15] ARM: OMAP5: PM: Set MPUSS-EMIF clock-domain static dependency Santosh Shilimkar
2013-03-01 12:10   ` Santosh Shilimkar
2013-03-01 12:10 ` [PATCH 05/15] ARM: OMAP5: PM: Enables ES2 PM mode by default Santosh Shilimkar
2013-03-01 12:10   ` Santosh Shilimkar
2013-03-01 19:37   ` Nishanth Menon
2013-03-01 19:37     ` Nishanth Menon
2013-03-02  5:47     ` Santosh Shilimkar
2013-03-02  5:47       ` Santosh Shilimkar
2013-03-04 18:29       ` Nishanth Menon
2013-03-04 18:29         ` Nishanth Menon
2013-03-10 18:07         ` Santosh Shilimkar
2013-03-10 18:07           ` Santosh Shilimkar
2013-03-01 12:10 ` [PATCH 06/15] ARM: OMAP5: PM: Enable Mercury retention mode on CPUx powerdomains Santosh Shilimkar
2013-03-01 12:10   ` Santosh Shilimkar
2013-03-01 19:42   ` Nishanth Menon
2013-03-01 19:42     ` Nishanth Menon
2013-03-02  5:52     ` Santosh Shilimkar
2013-03-02  5:52       ` Santosh Shilimkar
2013-03-04 18:33       ` Nishanth Menon
2013-03-04 18:33         ` Nishanth Menon
2013-03-01 12:10 ` [PATCH 07/15] ARM: OMAP5: Add init_late() hook to enable pm initialization Santosh Shilimkar
2013-03-01 12:10   ` Santosh Shilimkar
2013-03-01 20:12   ` Nishanth Menon
2013-03-01 20:12     ` Nishanth Menon
2013-03-02  6:00     ` Santosh Shilimkar
2013-03-02  6:00       ` Santosh Shilimkar
2013-03-04 18:35       ` Nishanth Menon
2013-03-04 18:35         ` Nishanth Menon
2013-03-01 12:10 ` [PATCH 08/15] ARM: OMAP5: PM: Add CPU power off mode support Santosh Shilimkar
2013-03-01 12:10   ` Santosh Shilimkar
2013-03-01 21:36   ` Nishanth Menon
2013-03-01 21:36     ` Nishanth Menon
2013-03-02  6:14     ` Santosh Shilimkar
2013-03-02  6:14       ` Santosh Shilimkar
2013-03-04 18:38       ` Nishanth Menon
2013-03-04 18:38         ` Nishanth Menon
2013-03-01 12:10 ` [PATCH 09/15] ARM: OMAP4+: PM: Restore CPU power state to ON with clockdomain force wakeup method Santosh Shilimkar
2013-03-01 12:10   ` Santosh Shilimkar
2013-03-01 21:53   ` Nishanth Menon
2013-03-01 21:53     ` Nishanth Menon
2013-03-02  6:16     ` Santosh Shilimkar
2013-03-02  6:16       ` Santosh Shilimkar
2013-03-01 12:10 ` [PATCH 10/15] ARM: OMAP5: PM: Add MPU Open Switch Retention support Santosh Shilimkar
2013-03-01 12:10   ` Santosh Shilimkar
2013-03-01 22:05   ` Nishanth Menon
2013-03-01 22:05     ` Nishanth Menon
2013-03-01 12:11 ` [PATCH 11/15] ARM: OMAP5: PM: Add L2 memory power down support Santosh Shilimkar
2013-03-01 12:11   ` Santosh Shilimkar
2013-03-01 23:43   ` Nishanth Menon
2013-03-01 23:43     ` Nishanth Menon
2013-03-02  6:24     ` Santosh Shilimkar
2013-03-02  6:24       ` Santosh Shilimkar
2013-03-04 18:41       ` Nishanth Menon
2013-03-04 18:41         ` Nishanth Menon
2013-03-01 12:11 ` [PATCH 12/15] ARM: OMAP4+: CPUidle: Cleanup idle driver for OMAP5 support Santosh Shilimkar
2013-03-01 12:11   ` Santosh Shilimkar
2013-03-01 23:56   ` Nishanth Menon
2013-03-01 23:56     ` Nishanth Menon
2013-03-02  6:25     ` Santosh Shilimkar
2013-03-02  6:25       ` Santosh Shilimkar
2013-03-01 12:11 ` [PATCH 13/15] ARM: OMAP4+: CPUidle: Deprecate use of omap4_mpuss_read_prev_context_state() Santosh Shilimkar
2013-03-01 12:11   ` Santosh Shilimkar
2013-03-02  0:03   ` Nishanth Menon
2013-03-02  0:03     ` Nishanth Menon
2013-03-01 12:11 ` [PATCH 14/15] ARM: OMAP4+: CPUidle: Add OMAP5 idle driver support Santosh Shilimkar
2013-03-01 12:11   ` Santosh Shilimkar
2013-03-02  0:25   ` Nishanth Menon
2013-03-02  0:25     ` Nishanth Menon
2013-03-02  6:47     ` Santosh Shilimkar
2013-03-02  6:47       ` Santosh Shilimkar
2013-03-04 18:48       ` Nishanth Menon
2013-03-04 18:48         ` Nishanth Menon
2013-03-01 12:11 ` [PATCH 15/15] ARM: OMAP5: PM: handle device instance for for coldreset Santosh Shilimkar
2013-03-01 12:11   ` Santosh Shilimkar
2013-03-01 13:04   ` Nishanth Menon
2013-03-01 13:04     ` Nishanth Menon
2013-03-01 13:09     ` Santosh Shilimkar
2013-03-01 13:09       ` Santosh Shilimkar
2013-03-01 13:13       ` Nishanth Menon
2013-03-01 13:13         ` Nishanth Menon
2013-03-01 13:16         ` Santosh Shilimkar
2013-03-01 13:16           ` Santosh Shilimkar

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