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From: dinguyen@altera.com (dinguyen at altera.com)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCHv3 4/4] clocksource: dw_apb_timer_of: Fix read_sched_clock
Date: Wed, 21 Aug 2013 15:53:47 -0500	[thread overview]
Message-ID: <1377118427-20644-4-git-send-email-dinguyen@altera.com> (raw)
In-Reply-To: <1377118427-20644-1-git-send-email-dinguyen@altera.com>

From: Dinh Nguyen <dinguyen@altera.com>

The read_sched_clock should return the ~value because the clock is a
countdown implementation. read_sched_clock() should be the same as
__apbt_read_clocksource().

If a separate timer for the sched_clock exist, then read_sched_clock()
will return an incorrect value. The (sched_io_base + 0x4) needs to be in
the function for both cases.

Maintain backwards compatibility for "dw-apb-timer-sp" and
"dw-apb-timer-osc".

Signed-off-by: Dinh Nguyen <dinguyen@altera.com>
Acked-by: Jamie Iles <jamie@jamieiles.com>
CC: Rob Herring <rob.herring@calxeda.com>
CC: Arnd Bergmann <arnd@arndb.de>
Cc: Olof Johansson <olof@lixom.net>
CC: Jamie Iles <jamie@jamieiles.com>
Cc: John Stultz <john.stultz@linaro.org>
Cc: Daniel Lezcano <daniel.lezcano@linaro.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Linus Walleij <linus.walleij@linaro.org>
Cc: Pavel Machek <pavel@denx.de>
Cc: Heiko Stuebner <heiko@sntech.de>
Cc: linux-arm-kernel at lists.infradead.org

v3:
- Use APBTMR_N_CURRENT_VALUE define in read_sched_clock()

v2:
- Maintain backwards compatibility for "dw-apb-timer-sp" and
  "dw-apb-timer-osc".
---
 drivers/clocksource/dw_apb_timer_of.c |    9 +++++----
 1 file changed, 5 insertions(+), 4 deletions(-)

diff --git a/drivers/clocksource/dw_apb_timer_of.c b/drivers/clocksource/dw_apb_timer_of.c
index 4cbae4f..01c1238 100644
--- a/drivers/clocksource/dw_apb_timer_of.c
+++ b/drivers/clocksource/dw_apb_timer_of.c
@@ -102,18 +102,17 @@ static void add_clocksource(struct device_node *source_timer)
 	 * timer is found. sched_io_base then points to the current_value
 	 * register of the clocksource timer.
 	 */
-	sched_io_base = iobase + 0x04;
+	sched_io_base = iobase;
 	sched_rate = rate;
 }
 
 static u32 read_sched_clock(void)
 {
-	return __raw_readl(sched_io_base);
+	return ~__raw_readl(sched_io_base + APBTMR_N_CURRENT_VALUE);
 }
 
 static const struct of_device_id sptimer_ids[] __initconst = {
 	{ .compatible = "picochip,pc3x2-rtc" },
-	{ .compatible = "snps,dw-apb-timer-sp" },
 	{ /* Sentinel */ },
 };
 
@@ -153,4 +152,6 @@ static void __init dw_apb_timer_init(struct device_node *timer)
 	num_called++;
 }
 CLOCKSOURCE_OF_DECLARE(pc3x2_timer, "picochip,pc3x2-timer", dw_apb_timer_init);
-CLOCKSOURCE_OF_DECLARE(apb_timer, "snps,dw-apb-timer-osc", dw_apb_timer_init);
+CLOCKSOURCE_OF_DECLARE(apb_timer_osc, "snps,dw-apb-timer-osc", dw_apb_timer_init);
+CLOCKSOURCE_OF_DECLARE(apb_timer_sp, "snps,dw-apb-timer-sp", dw_apb_timer_init);
+CLOCKSOURCE_OF_DECLARE(apb_timer, "snps,dw-apb-timer", dw_apb_timer_init);
-- 
1.7.9.5

  parent reply	other threads:[~2013-08-21 20:53 UTC|newest]

Thread overview: 13+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2013-08-21 20:53 [PATCHv3 1/4] arm: dts: Add clock entries for timers in SOCFPGA dinguyen at altera.com
2013-08-21 20:53 ` [PATCHv3 2/4] arm: dts: Change dw-apb-timer-osc and dw-apb-timer-sp to just dw-apb-timer dinguyen at altera.com
2013-08-21 20:53 ` [PATCHv3 3/4] clocksource: dw_apb_timer: Move timer defines to header file dinguyen at altera.com
2013-08-22 11:01   ` Pavel Machek
2013-08-22 16:19     ` Dinh Nguyen
2013-08-21 20:53 ` dinguyen at altera.com [this message]
2013-08-22 10:52 ` [PATCHv3 1/4] arm: dts: Add clock entries for timers in SOCFPGA Pavel Machek
2013-08-28 15:31 ` Steffen Trumtrar
2013-08-28 15:31   ` Steffen Trumtrar
2013-08-29 15:55   ` Dinh Nguyen
2013-08-29 15:55     ` Dinh Nguyen
2013-08-29 19:20     ` Steffen Trumtrar
2013-08-29 19:20       ` Steffen Trumtrar

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