From: Huang Shijie <b32955@freescale.com>
To: broonie@kernel.org
Cc: dwmw2@infradead.org, dedekind1@gmail.com,
computersforpeace@gmail.com, shawn.guo@linaro.org,
kernel@pengutronix.de, b18965@freescale.com,
b44548@freescale.com, B20596@freescale.com,
linux-mtd@lists.infradead.org,
linux-arm-kernel@lists.infradead.org, linux-spi@vger.kernel.org,
devicetree@vger.kernel.org, linux-doc@vger.kernel.org,
Huang Shijie <b32955@freescale.com>
Subject: [PATCH v2 7/8] ARM: dts: vf610: change the PAD values for Quadspi
Date: Mon, 26 Aug 2013 12:41:41 +0800 [thread overview]
Message-ID: <1377492102-23543-8-git-send-email-b32955@freescale.com> (raw)
In-Reply-To: <1377492102-23543-1-git-send-email-b32955@freescale.com>
Current pad values do not works in the 66M DDR quad read mode.
This patch adjusts this pad values, and tested in the 66M DDR quad read
mode with S25FL128S.
Signed-off-by: Huang Shijie <b32955@freescale.com>
---
arch/arm/boot/dts/vf610.dtsi | 24 ++++++++++++------------
1 files changed, 12 insertions(+), 12 deletions(-)
diff --git a/arch/arm/boot/dts/vf610.dtsi b/arch/arm/boot/dts/vf610.dtsi
index 67d929c..c622562 100644
--- a/arch/arm/boot/dts/vf610.dtsi
+++ b/arch/arm/boot/dts/vf610.dtsi
@@ -285,18 +285,18 @@
qspi0 {
pinctrl_qspi0_1: qspi0grp_1 {
fsl,pins = <
- VF610_PAD_PTD0__QSPI0_A_QSCK 0x307b
- VF610_PAD_PTD1__QSPI0_A_CS0 0x307f
- VF610_PAD_PTD2__QSPI0_A_DATA3 0x3073
- VF610_PAD_PTD3__QSPI0_A_DATA2 0x3073
- VF610_PAD_PTD4__QSPI0_A_DATA1 0x3073
- VF610_PAD_PTD5__QSPI0_A_DATA0 0x307b
- VF610_PAD_PTD7__QSPI0_B_QSCK 0x307b
- VF610_PAD_PTD8__QSPI0_B_CS0 0x307f
- VF610_PAD_PTD9__QSPI0_B_DATA3 0x3073
- VF610_PAD_PTD10__QSPI0_B_DATA2 0x3073
- VF610_PAD_PTD11__QSPI0_B_DATA1 0x3073
- VF610_PAD_PTD12__QSPI0_B_DATA0 0x307b
+ VF610_PAD_PTD0__QSPI0_A_QSCK 0x31c3
+ VF610_PAD_PTD1__QSPI0_A_CS0 0x31ff
+ VF610_PAD_PTD2__QSPI0_A_DATA3 0x31c3
+ VF610_PAD_PTD3__QSPI0_A_DATA2 0x31c3
+ VF610_PAD_PTD4__QSPI0_A_DATA1 0x31c3
+ VF610_PAD_PTD5__QSPI0_A_DATA0 0x31c3
+ VF610_PAD_PTD7__QSPI0_B_QSCK 0x31c3
+ VF610_PAD_PTD8__QSPI0_B_CS0 0x31ff
+ VF610_PAD_PTD9__QSPI0_B_DATA3 0x31c3
+ VF610_PAD_PTD10__QSPI0_B_DATA2 0x31c3
+ VF610_PAD_PTD11__QSPI0_B_DATA1 0x31c3
+ VF610_PAD_PTD12__QSPI0_B_DATA0 0x31c3
>;
};
};
--
1.7.1
WARNING: multiple messages have this Message-ID (diff)
From: Huang Shijie <b32955@freescale.com>
To: <broonie@kernel.org>
Cc: B20596@freescale.com, computersforpeace@gmail.com,
b44548@freescale.com, dedekind1@gmail.com,
linux-doc@vger.kernel.org, b18965@freescale.com,
linux-spi@vger.kernel.org, Huang Shijie <b32955@freescale.com>,
devicetree@vger.kernel.org, linux-mtd@lists.infradead.org,
kernel@pengutronix.de, shawn.guo@linaro.org, dwmw2@infradead.org,
linux-arm-kernel@lists.infradead.org
Subject: [PATCH v2 7/8] ARM: dts: vf610: change the PAD values for Quadspi
Date: Mon, 26 Aug 2013 12:41:41 +0800 [thread overview]
Message-ID: <1377492102-23543-8-git-send-email-b32955@freescale.com> (raw)
In-Reply-To: <1377492102-23543-1-git-send-email-b32955@freescale.com>
Current pad values do not works in the 66M DDR quad read mode.
This patch adjusts this pad values, and tested in the 66M DDR quad read
mode with S25FL128S.
Signed-off-by: Huang Shijie <b32955@freescale.com>
---
arch/arm/boot/dts/vf610.dtsi | 24 ++++++++++++------------
1 files changed, 12 insertions(+), 12 deletions(-)
diff --git a/arch/arm/boot/dts/vf610.dtsi b/arch/arm/boot/dts/vf610.dtsi
index 67d929c..c622562 100644
--- a/arch/arm/boot/dts/vf610.dtsi
+++ b/arch/arm/boot/dts/vf610.dtsi
@@ -285,18 +285,18 @@
qspi0 {
pinctrl_qspi0_1: qspi0grp_1 {
fsl,pins = <
- VF610_PAD_PTD0__QSPI0_A_QSCK 0x307b
- VF610_PAD_PTD1__QSPI0_A_CS0 0x307f
- VF610_PAD_PTD2__QSPI0_A_DATA3 0x3073
- VF610_PAD_PTD3__QSPI0_A_DATA2 0x3073
- VF610_PAD_PTD4__QSPI0_A_DATA1 0x3073
- VF610_PAD_PTD5__QSPI0_A_DATA0 0x307b
- VF610_PAD_PTD7__QSPI0_B_QSCK 0x307b
- VF610_PAD_PTD8__QSPI0_B_CS0 0x307f
- VF610_PAD_PTD9__QSPI0_B_DATA3 0x3073
- VF610_PAD_PTD10__QSPI0_B_DATA2 0x3073
- VF610_PAD_PTD11__QSPI0_B_DATA1 0x3073
- VF610_PAD_PTD12__QSPI0_B_DATA0 0x307b
+ VF610_PAD_PTD0__QSPI0_A_QSCK 0x31c3
+ VF610_PAD_PTD1__QSPI0_A_CS0 0x31ff
+ VF610_PAD_PTD2__QSPI0_A_DATA3 0x31c3
+ VF610_PAD_PTD3__QSPI0_A_DATA2 0x31c3
+ VF610_PAD_PTD4__QSPI0_A_DATA1 0x31c3
+ VF610_PAD_PTD5__QSPI0_A_DATA0 0x31c3
+ VF610_PAD_PTD7__QSPI0_B_QSCK 0x31c3
+ VF610_PAD_PTD8__QSPI0_B_CS0 0x31ff
+ VF610_PAD_PTD9__QSPI0_B_DATA3 0x31c3
+ VF610_PAD_PTD10__QSPI0_B_DATA2 0x31c3
+ VF610_PAD_PTD11__QSPI0_B_DATA1 0x31c3
+ VF610_PAD_PTD12__QSPI0_B_DATA0 0x31c3
>;
};
};
--
1.7.1
WARNING: multiple messages have this Message-ID (diff)
From: b32955@freescale.com (Huang Shijie)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v2 7/8] ARM: dts: vf610: change the PAD values for Quadspi
Date: Mon, 26 Aug 2013 12:41:41 +0800 [thread overview]
Message-ID: <1377492102-23543-8-git-send-email-b32955@freescale.com> (raw)
In-Reply-To: <1377492102-23543-1-git-send-email-b32955@freescale.com>
Current pad values do not works in the 66M DDR quad read mode.
This patch adjusts this pad values, and tested in the 66M DDR quad read
mode with S25FL128S.
Signed-off-by: Huang Shijie <b32955@freescale.com>
---
arch/arm/boot/dts/vf610.dtsi | 24 ++++++++++++------------
1 files changed, 12 insertions(+), 12 deletions(-)
diff --git a/arch/arm/boot/dts/vf610.dtsi b/arch/arm/boot/dts/vf610.dtsi
index 67d929c..c622562 100644
--- a/arch/arm/boot/dts/vf610.dtsi
+++ b/arch/arm/boot/dts/vf610.dtsi
@@ -285,18 +285,18 @@
qspi0 {
pinctrl_qspi0_1: qspi0grp_1 {
fsl,pins = <
- VF610_PAD_PTD0__QSPI0_A_QSCK 0x307b
- VF610_PAD_PTD1__QSPI0_A_CS0 0x307f
- VF610_PAD_PTD2__QSPI0_A_DATA3 0x3073
- VF610_PAD_PTD3__QSPI0_A_DATA2 0x3073
- VF610_PAD_PTD4__QSPI0_A_DATA1 0x3073
- VF610_PAD_PTD5__QSPI0_A_DATA0 0x307b
- VF610_PAD_PTD7__QSPI0_B_QSCK 0x307b
- VF610_PAD_PTD8__QSPI0_B_CS0 0x307f
- VF610_PAD_PTD9__QSPI0_B_DATA3 0x3073
- VF610_PAD_PTD10__QSPI0_B_DATA2 0x3073
- VF610_PAD_PTD11__QSPI0_B_DATA1 0x3073
- VF610_PAD_PTD12__QSPI0_B_DATA0 0x307b
+ VF610_PAD_PTD0__QSPI0_A_QSCK 0x31c3
+ VF610_PAD_PTD1__QSPI0_A_CS0 0x31ff
+ VF610_PAD_PTD2__QSPI0_A_DATA3 0x31c3
+ VF610_PAD_PTD3__QSPI0_A_DATA2 0x31c3
+ VF610_PAD_PTD4__QSPI0_A_DATA1 0x31c3
+ VF610_PAD_PTD5__QSPI0_A_DATA0 0x31c3
+ VF610_PAD_PTD7__QSPI0_B_QSCK 0x31c3
+ VF610_PAD_PTD8__QSPI0_B_CS0 0x31ff
+ VF610_PAD_PTD9__QSPI0_B_DATA3 0x31c3
+ VF610_PAD_PTD10__QSPI0_B_DATA2 0x31c3
+ VF610_PAD_PTD11__QSPI0_B_DATA1 0x31c3
+ VF610_PAD_PTD12__QSPI0_B_DATA0 0x31c3
>;
};
};
--
1.7.1
next prev parent reply other threads:[~2013-08-26 4:41 UTC|newest]
Thread overview: 41+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-08-26 4:41 [PATCH v2 0/8] Add the Quadspi driver for vf610-twr Huang Shijie
2013-08-26 4:41 ` Huang Shijie
2013-08-26 4:41 ` Huang Shijie
2013-08-26 4:41 ` [PATCH v2 1/8] mtd: m25p80: move the spi-nor commands to a header Huang Shijie
2013-08-26 4:41 ` Huang Shijie
2013-08-26 4:41 ` Huang Shijie
2013-08-26 4:41 ` [PATCH v2 2/8] mtd: m25p80: add support for Spansion s25fl128s chip Huang Shijie
2013-08-26 4:41 ` Huang Shijie
2013-08-26 4:41 ` Huang Shijie
2013-08-26 4:41 ` [PATCH v2 3/8] mtd: m25p80: add the quad-read support Huang Shijie
2013-08-26 4:41 ` Huang Shijie
2013-08-26 4:41 ` Huang Shijie
2013-08-26 4:41 ` [PATCH v2 4/8] mtd: m25p80: add the DDR " Huang Shijie
2013-08-26 4:41 ` Huang Shijie
2013-08-26 4:41 ` Huang Shijie
2013-08-26 6:22 ` Sourav Poddar
2013-08-26 6:22 ` Sourav Poddar
2013-08-26 6:22 ` Sourav Poddar
2013-08-26 10:35 ` Huang Shijie
2013-08-26 10:35 ` Huang Shijie
2013-08-26 10:35 ` Huang Shijie
2013-08-26 4:41 ` [PATCH v2 5/8] spi: Add Freescale QuadSpi driver Huang Shijie
2013-08-26 4:41 ` Huang Shijie
2013-08-26 4:41 ` Huang Shijie
2013-08-26 6:10 ` Sourav Poddar
2013-08-26 6:10 ` Sourav Poddar
2013-08-26 6:21 ` Huang Shijie
2013-08-26 6:21 ` Huang Shijie
2013-08-26 6:21 ` Huang Shijie
2013-08-27 15:37 ` Mark Brown
2013-08-27 15:37 ` Mark Brown
2013-08-27 15:37 ` Mark Brown
2013-08-26 4:41 ` [PATCH v2 6/8] Documentation: add the binding file for Quadspi driver Huang Shijie
2013-08-26 4:41 ` Huang Shijie
2013-08-26 4:41 ` Huang Shijie
2013-08-26 4:41 ` Huang Shijie [this message]
2013-08-26 4:41 ` [PATCH v2 7/8] ARM: dts: vf610: change the PAD values for Quadspi Huang Shijie
2013-08-26 4:41 ` Huang Shijie
2013-08-26 4:41 ` [PATCH v2 8/8] ARM: dts: vf610-twr: Add SPI NOR support Huang Shijie
2013-08-26 4:41 ` Huang Shijie
2013-08-26 4:41 ` Huang Shijie
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