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From: Huang Shijie <b32955@freescale.com>
To: broonie@kernel.org
Cc: dwmw2@infradead.org, dedekind1@gmail.com,
	computersforpeace@gmail.com, shawn.guo@linaro.org,
	kernel@pengutronix.de, b18965@freescale.com,
	b44548@freescale.com, B20596@freescale.com,
	linux-mtd@lists.infradead.org,
	linux-arm-kernel@lists.infradead.org, linux-spi@vger.kernel.org,
	devicetree@vger.kernel.org, linux-doc@vger.kernel.org,
	Huang Shijie <b32955@freescale.com>
Subject: [PATCH v2 8/8] ARM: dts: vf610-twr: Add SPI NOR support
Date: Mon, 26 Aug 2013 12:41:42 +0800	[thread overview]
Message-ID: <1377492102-23543-9-git-send-email-b32955@freescale.com> (raw)
In-Reply-To: <1377492102-23543-1-git-send-email-b32955@freescale.com>

vf610-twr has two s25fl128s SPI NOR flashs connected to QuadSpi0.
Add support for them.

Note: we enable the DDR Quad read for the two NOR flashs which runs
in 66MHz.

Signed-off-by: Huang Shijie <b32955@freescale.com>
---
 arch/arm/boot/dts/vf610-twr.dts |   36 ++++++++++++++++++++++++++++++++++++
 1 files changed, 36 insertions(+), 0 deletions(-)

diff --git a/arch/arm/boot/dts/vf610-twr.dts b/arch/arm/boot/dts/vf610-twr.dts
index 1a58678..e9149de 100644
--- a/arch/arm/boot/dts/vf610-twr.dts
+++ b/arch/arm/boot/dts/vf610-twr.dts
@@ -62,3 +62,39 @@
 	pinctrl-0 = <&pinctrl_uart1_1>;
 	status = "okay";
 };
+
+&qspi0 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_qspi0_1>;
+	fsl,nor-size = <0x1000000>;
+	fsl,spi-num-chipselects = <2>;
+	status = "okay";
+
+	flash0: s25fl128s@0 {
+		#address-cells = <1>;
+		#size-cells = <1>;
+		compatible = "spansion,s25fl128s";
+		spi-max-frequency = <66000000>;
+		m25p,ddr-quad-read = <1>;
+		reg = <0>;
+
+		partition@0 {
+			label = "s25fl128s-0";
+			reg = <0x0 0x1000000>;
+		};
+	};
+
+	flash1: s25fl128s@1 {
+		#address-cells = <1>;
+		#size-cells = <1>;
+		compatible = "spansion,s25fl128s";
+		spi-max-frequency = <66000000>;
+		m25p,ddr-quad-read = <1>;
+		reg = <1>;
+
+		partition@0x0 {
+			label = "s25fl128s-1";
+			reg = <0x0 0x1000000>;
+		};
+	};
+};
-- 
1.7.1



WARNING: multiple messages have this Message-ID (diff)
From: Huang Shijie <b32955@freescale.com>
To: <broonie@kernel.org>
Cc: B20596@freescale.com, computersforpeace@gmail.com,
	b44548@freescale.com, dedekind1@gmail.com,
	linux-doc@vger.kernel.org, b18965@freescale.com,
	linux-spi@vger.kernel.org, Huang Shijie <b32955@freescale.com>,
	devicetree@vger.kernel.org, linux-mtd@lists.infradead.org,
	kernel@pengutronix.de, shawn.guo@linaro.org, dwmw2@infradead.org,
	linux-arm-kernel@lists.infradead.org
Subject: [PATCH v2 8/8] ARM: dts: vf610-twr: Add SPI NOR support
Date: Mon, 26 Aug 2013 12:41:42 +0800	[thread overview]
Message-ID: <1377492102-23543-9-git-send-email-b32955@freescale.com> (raw)
In-Reply-To: <1377492102-23543-1-git-send-email-b32955@freescale.com>

vf610-twr has two s25fl128s SPI NOR flashs connected to QuadSpi0.
Add support for them.

Note: we enable the DDR Quad read for the two NOR flashs which runs
in 66MHz.

Signed-off-by: Huang Shijie <b32955@freescale.com>
---
 arch/arm/boot/dts/vf610-twr.dts |   36 ++++++++++++++++++++++++++++++++++++
 1 files changed, 36 insertions(+), 0 deletions(-)

diff --git a/arch/arm/boot/dts/vf610-twr.dts b/arch/arm/boot/dts/vf610-twr.dts
index 1a58678..e9149de 100644
--- a/arch/arm/boot/dts/vf610-twr.dts
+++ b/arch/arm/boot/dts/vf610-twr.dts
@@ -62,3 +62,39 @@
 	pinctrl-0 = <&pinctrl_uart1_1>;
 	status = "okay";
 };
+
+&qspi0 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_qspi0_1>;
+	fsl,nor-size = <0x1000000>;
+	fsl,spi-num-chipselects = <2>;
+	status = "okay";
+
+	flash0: s25fl128s@0 {
+		#address-cells = <1>;
+		#size-cells = <1>;
+		compatible = "spansion,s25fl128s";
+		spi-max-frequency = <66000000>;
+		m25p,ddr-quad-read = <1>;
+		reg = <0>;
+
+		partition@0 {
+			label = "s25fl128s-0";
+			reg = <0x0 0x1000000>;
+		};
+	};
+
+	flash1: s25fl128s@1 {
+		#address-cells = <1>;
+		#size-cells = <1>;
+		compatible = "spansion,s25fl128s";
+		spi-max-frequency = <66000000>;
+		m25p,ddr-quad-read = <1>;
+		reg = <1>;
+
+		partition@0x0 {
+			label = "s25fl128s-1";
+			reg = <0x0 0x1000000>;
+		};
+	};
+};
-- 
1.7.1

WARNING: multiple messages have this Message-ID (diff)
From: b32955@freescale.com (Huang Shijie)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v2 8/8] ARM: dts: vf610-twr: Add SPI NOR support
Date: Mon, 26 Aug 2013 12:41:42 +0800	[thread overview]
Message-ID: <1377492102-23543-9-git-send-email-b32955@freescale.com> (raw)
In-Reply-To: <1377492102-23543-1-git-send-email-b32955@freescale.com>

vf610-twr has two s25fl128s SPI NOR flashs connected to QuadSpi0.
Add support for them.

Note: we enable the DDR Quad read for the two NOR flashs which runs
in 66MHz.

Signed-off-by: Huang Shijie <b32955@freescale.com>
---
 arch/arm/boot/dts/vf610-twr.dts |   36 ++++++++++++++++++++++++++++++++++++
 1 files changed, 36 insertions(+), 0 deletions(-)

diff --git a/arch/arm/boot/dts/vf610-twr.dts b/arch/arm/boot/dts/vf610-twr.dts
index 1a58678..e9149de 100644
--- a/arch/arm/boot/dts/vf610-twr.dts
+++ b/arch/arm/boot/dts/vf610-twr.dts
@@ -62,3 +62,39 @@
 	pinctrl-0 = <&pinctrl_uart1_1>;
 	status = "okay";
 };
+
+&qspi0 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_qspi0_1>;
+	fsl,nor-size = <0x1000000>;
+	fsl,spi-num-chipselects = <2>;
+	status = "okay";
+
+	flash0: s25fl128s at 0 {
+		#address-cells = <1>;
+		#size-cells = <1>;
+		compatible = "spansion,s25fl128s";
+		spi-max-frequency = <66000000>;
+		m25p,ddr-quad-read = <1>;
+		reg = <0>;
+
+		partition at 0 {
+			label = "s25fl128s-0";
+			reg = <0x0 0x1000000>;
+		};
+	};
+
+	flash1: s25fl128s at 1 {
+		#address-cells = <1>;
+		#size-cells = <1>;
+		compatible = "spansion,s25fl128s";
+		spi-max-frequency = <66000000>;
+		m25p,ddr-quad-read = <1>;
+		reg = <1>;
+
+		partition at 0x0 {
+			label = "s25fl128s-1";
+			reg = <0x0 0x1000000>;
+		};
+	};
+};
-- 
1.7.1

  parent reply	other threads:[~2013-08-26  4:41 UTC|newest]

Thread overview: 41+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2013-08-26  4:41 [PATCH v2 0/8] Add the Quadspi driver for vf610-twr Huang Shijie
2013-08-26  4:41 ` Huang Shijie
2013-08-26  4:41 ` Huang Shijie
2013-08-26  4:41 ` [PATCH v2 1/8] mtd: m25p80: move the spi-nor commands to a header Huang Shijie
2013-08-26  4:41   ` Huang Shijie
2013-08-26  4:41   ` Huang Shijie
2013-08-26  4:41 ` [PATCH v2 2/8] mtd: m25p80: add support for Spansion s25fl128s chip Huang Shijie
2013-08-26  4:41   ` Huang Shijie
2013-08-26  4:41   ` Huang Shijie
2013-08-26  4:41 ` [PATCH v2 3/8] mtd: m25p80: add the quad-read support Huang Shijie
2013-08-26  4:41   ` Huang Shijie
2013-08-26  4:41   ` Huang Shijie
2013-08-26  4:41 ` [PATCH v2 4/8] mtd: m25p80: add the DDR " Huang Shijie
2013-08-26  4:41   ` Huang Shijie
2013-08-26  4:41   ` Huang Shijie
2013-08-26  6:22   ` Sourav Poddar
2013-08-26  6:22     ` Sourav Poddar
2013-08-26  6:22     ` Sourav Poddar
2013-08-26 10:35     ` Huang Shijie
2013-08-26 10:35       ` Huang Shijie
2013-08-26 10:35       ` Huang Shijie
2013-08-26  4:41 ` [PATCH v2 5/8] spi: Add Freescale QuadSpi driver Huang Shijie
2013-08-26  4:41   ` Huang Shijie
2013-08-26  4:41   ` Huang Shijie
2013-08-26  6:10   ` Sourav Poddar
2013-08-26  6:10     ` Sourav Poddar
2013-08-26  6:21     ` Huang Shijie
2013-08-26  6:21       ` Huang Shijie
2013-08-26  6:21       ` Huang Shijie
2013-08-27 15:37     ` Mark Brown
2013-08-27 15:37       ` Mark Brown
2013-08-27 15:37       ` Mark Brown
2013-08-26  4:41 ` [PATCH v2 6/8] Documentation: add the binding file for Quadspi driver Huang Shijie
2013-08-26  4:41   ` Huang Shijie
2013-08-26  4:41   ` Huang Shijie
2013-08-26  4:41 ` [PATCH v2 7/8] ARM: dts: vf610: change the PAD values for Quadspi Huang Shijie
2013-08-26  4:41   ` Huang Shijie
2013-08-26  4:41   ` Huang Shijie
2013-08-26  4:41 ` Huang Shijie [this message]
2013-08-26  4:41   ` [PATCH v2 8/8] ARM: dts: vf610-twr: Add SPI NOR support Huang Shijie
2013-08-26  4:41   ` Huang Shijie

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