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From: "Michel Dänzer" <michel@daenzer.net>
To: dri-devel@lists.freedesktop.org
Subject: [PATCH 3/3] drm/radeon/cik: Program pipe configuration for 1D tiling modes as well
Date: Wed, 18 Sep 2013 15:39:42 +0200	[thread overview]
Message-ID: <1379511582-8950-3-git-send-email-michel@daenzer.net> (raw)
In-Reply-To: <1379511582-8950-1-git-send-email-michel@daenzer.net>

From: Michel Dänzer <michel.daenzer@amd.com>

Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
---

Not sure this is necessary, but AFAICT the pipe configuration applies to
1D tiling modes as well.

 drivers/gpu/drm/radeon/cik.c | 48 +++++++++++++++++++++++++++++---------------
 1 file changed, 32 insertions(+), 16 deletions(-)

diff --git a/drivers/gpu/drm/radeon/cik.c b/drivers/gpu/drm/radeon/cik.c
index 8feaf51..35d8247 100644
--- a/drivers/gpu/drm/radeon/cik.c
+++ b/drivers/gpu/drm/radeon/cik.c
@@ -1788,7 +1788,8 @@ static void cik_tiling_mode_table_init(struct radeon_device *rdev)
 				break;
 			case 5:
 				gb_tile_moden = (ARRAY_MODE(ARRAY_1D_TILED_THIN1) |
-						 MICRO_TILE_MODE_NEW(ADDR_SURF_DEPTH_MICRO_TILING));
+						 MICRO_TILE_MODE_NEW(ADDR_SURF_DEPTH_MICRO_TILING)) |
+						 PIPE_CONFIG(ADDR_SURF_P8_32x32_16x16);
 				break;
 			case 6:
 				gb_tile_moden = (ARRAY_MODE(ARRAY_PRT_2D_TILED_THIN1) |
@@ -1808,7 +1809,8 @@ static void cik_tiling_mode_table_init(struct radeon_device *rdev)
 				break;
 			case 9:
 				gb_tile_moden = (ARRAY_MODE(ARRAY_1D_TILED_THIN1) |
-						 MICRO_TILE_MODE_NEW(ADDR_SURF_DISPLAY_MICRO_TILING));
+						 MICRO_TILE_MODE_NEW(ADDR_SURF_DISPLAY_MICRO_TILING)) |
+						 PIPE_CONFIG(ADDR_SURF_P8_32x32_16x16);
 				break;
 			case 10:
 				gb_tile_moden = (ARRAY_MODE(ARRAY_2D_TILED_THIN1) |
@@ -1830,7 +1832,8 @@ static void cik_tiling_mode_table_init(struct radeon_device *rdev)
 				break;
 			case 13:
 				gb_tile_moden = (ARRAY_MODE(ARRAY_1D_TILED_THIN1) |
-						 MICRO_TILE_MODE_NEW(ADDR_SURF_THIN_MICRO_TILING));
+						 MICRO_TILE_MODE_NEW(ADDR_SURF_THIN_MICRO_TILING)) |
+						 PIPE_CONFIG(ADDR_SURF_P8_32x32_16x16);
 				break;
 			case 14:
 				gb_tile_moden = (ARRAY_MODE(ARRAY_2D_TILED_THIN1) |
@@ -1852,7 +1855,8 @@ static void cik_tiling_mode_table_init(struct radeon_device *rdev)
 				break;
 			case 27:
 				gb_tile_moden = (ARRAY_MODE(ARRAY_1D_TILED_THIN1) |
-						 MICRO_TILE_MODE_NEW(ADDR_SURF_ROTATED_MICRO_TILING));
+						 MICRO_TILE_MODE_NEW(ADDR_SURF_ROTATED_MICRO_TILING)) |
+						 PIPE_CONFIG(ADDR_SURF_P8_32x32_16x16);
 				break;
 			case 28:
 				gb_tile_moden = (ARRAY_MODE(ARRAY_2D_TILED_THIN1) |
@@ -2007,7 +2011,8 @@ static void cik_tiling_mode_table_init(struct radeon_device *rdev)
 					break;
 				case 5:
 					gb_tile_moden = (ARRAY_MODE(ARRAY_1D_TILED_THIN1) |
-							 MICRO_TILE_MODE_NEW(ADDR_SURF_DEPTH_MICRO_TILING));
+							 MICRO_TILE_MODE_NEW(ADDR_SURF_DEPTH_MICRO_TILING)) |
+							 PIPE_CONFIG(ADDR_SURF_P4_16x16);
 					break;
 				case 6:
 					gb_tile_moden = (ARRAY_MODE(ARRAY_PRT_2D_TILED_THIN1) |
@@ -2027,7 +2032,8 @@ static void cik_tiling_mode_table_init(struct radeon_device *rdev)
 					break;
 				case 9:
 					gb_tile_moden = (ARRAY_MODE(ARRAY_1D_TILED_THIN1) |
-							 MICRO_TILE_MODE_NEW(ADDR_SURF_DISPLAY_MICRO_TILING));
+							 MICRO_TILE_MODE_NEW(ADDR_SURF_DISPLAY_MICRO_TILING)) |
+							 PIPE_CONFIG(ADDR_SURF_P4_16x16);
 					break;
 				case 10:
 					gb_tile_moden = (ARRAY_MODE(ARRAY_2D_TILED_THIN1) |
@@ -2049,7 +2055,8 @@ static void cik_tiling_mode_table_init(struct radeon_device *rdev)
 					break;
 				case 13:
 					gb_tile_moden = (ARRAY_MODE(ARRAY_1D_TILED_THIN1) |
-							 MICRO_TILE_MODE_NEW(ADDR_SURF_THIN_MICRO_TILING));
+							 MICRO_TILE_MODE_NEW(ADDR_SURF_THIN_MICRO_TILING)) |
+							 PIPE_CONFIG(ADDR_SURF_P4_16x16);
 					break;
 				case 14:
 					gb_tile_moden = (ARRAY_MODE(ARRAY_2D_TILED_THIN1) |
@@ -2071,7 +2078,8 @@ static void cik_tiling_mode_table_init(struct radeon_device *rdev)
 					break;
 				case 27:
 					gb_tile_moden = (ARRAY_MODE(ARRAY_1D_TILED_THIN1) |
-							 MICRO_TILE_MODE_NEW(ADDR_SURF_ROTATED_MICRO_TILING));
+							 MICRO_TILE_MODE_NEW(ADDR_SURF_ROTATED_MICRO_TILING)) |
+							 PIPE_CONFIG(ADDR_SURF_P4_16x16);
 					break;
 				case 28:
 					gb_tile_moden = (ARRAY_MODE(ARRAY_PRT_2D_TILED_THIN1) |
@@ -2133,7 +2141,8 @@ static void cik_tiling_mode_table_init(struct radeon_device *rdev)
 					break;
 				case 5:
 					gb_tile_moden = (ARRAY_MODE(ARRAY_1D_TILED_THIN1) |
-							 MICRO_TILE_MODE_NEW(ADDR_SURF_DEPTH_MICRO_TILING));
+							 MICRO_TILE_MODE_NEW(ADDR_SURF_DEPTH_MICRO_TILING)) |
+							 PIPE_CONFIG(ADDR_SURF_P4_8x16);
 					break;
 				case 6:
 					gb_tile_moden = (ARRAY_MODE(ARRAY_PRT_2D_TILED_THIN1) |
@@ -2153,7 +2162,8 @@ static void cik_tiling_mode_table_init(struct radeon_device *rdev)
 					break;
 				case 9:
 					gb_tile_moden = (ARRAY_MODE(ARRAY_1D_TILED_THIN1) |
-							 MICRO_TILE_MODE_NEW(ADDR_SURF_DISPLAY_MICRO_TILING));
+							 MICRO_TILE_MODE_NEW(ADDR_SURF_DISPLAY_MICRO_TILING)) |
+							 PIPE_CONFIG(ADDR_SURF_P4_8x16);
 					break;
 				case 10:
 					gb_tile_moden = (ARRAY_MODE(ARRAY_2D_TILED_THIN1) |
@@ -2175,7 +2185,8 @@ static void cik_tiling_mode_table_init(struct radeon_device *rdev)
 					break;
 				case 13:
 					gb_tile_moden = (ARRAY_MODE(ARRAY_1D_TILED_THIN1) |
-							 MICRO_TILE_MODE_NEW(ADDR_SURF_THIN_MICRO_TILING));
+							 MICRO_TILE_MODE_NEW(ADDR_SURF_THIN_MICRO_TILING)) |
+							 PIPE_CONFIG(ADDR_SURF_P4_8x16);
 					break;
 				case 14:
 					gb_tile_moden = (ARRAY_MODE(ARRAY_2D_TILED_THIN1) |
@@ -2197,7 +2208,8 @@ static void cik_tiling_mode_table_init(struct radeon_device *rdev)
 					break;
 				case 27:
 					gb_tile_moden = (ARRAY_MODE(ARRAY_1D_TILED_THIN1) |
-							 MICRO_TILE_MODE_NEW(ADDR_SURF_ROTATED_MICRO_TILING));
+							 MICRO_TILE_MODE_NEW(ADDR_SURF_ROTATED_MICRO_TILING)) |
+							 PIPE_CONFIG(ADDR_SURF_P4_8x16);
 					break;
 				case 28:
 					gb_tile_moden = (ARRAY_MODE(ARRAY_PRT_2D_TILED_THIN1) |
@@ -2352,7 +2364,8 @@ static void cik_tiling_mode_table_init(struct radeon_device *rdev)
 				break;
 			case 5:
 				gb_tile_moden = (ARRAY_MODE(ARRAY_1D_TILED_THIN1) |
-						 MICRO_TILE_MODE_NEW(ADDR_SURF_DEPTH_MICRO_TILING));
+						 MICRO_TILE_MODE_NEW(ADDR_SURF_DEPTH_MICRO_TILING)) |
+						 PIPE_CONFIG(ADDR_SURF_P2);
 				break;
 			case 6:
 				gb_tile_moden = (ARRAY_MODE(ARRAY_PRT_2D_TILED_THIN1) |
@@ -2371,7 +2384,8 @@ static void cik_tiling_mode_table_init(struct radeon_device *rdev)
 				break;
 			case 9:
 				gb_tile_moden = (ARRAY_MODE(ARRAY_1D_TILED_THIN1) |
-						 MICRO_TILE_MODE_NEW(ADDR_SURF_DISPLAY_MICRO_TILING));
+						 MICRO_TILE_MODE_NEW(ADDR_SURF_DISPLAY_MICRO_TILING)) |
+						 PIPE_CONFIG(ADDR_SURF_P2);
 				break;
 			case 10:
 				gb_tile_moden = (ARRAY_MODE(ARRAY_2D_TILED_THIN1) |
@@ -2393,7 +2407,8 @@ static void cik_tiling_mode_table_init(struct radeon_device *rdev)
 				break;
 			case 13:
 				gb_tile_moden = (ARRAY_MODE(ARRAY_1D_TILED_THIN1) |
-						 MICRO_TILE_MODE_NEW(ADDR_SURF_THIN_MICRO_TILING));
+						 MICRO_TILE_MODE_NEW(ADDR_SURF_THIN_MICRO_TILING)) |
+						 PIPE_CONFIG(ADDR_SURF_P2);
 				break;
 			case 14:
 				gb_tile_moden = (ARRAY_MODE(ARRAY_2D_TILED_THIN1) |
@@ -2415,7 +2430,8 @@ static void cik_tiling_mode_table_init(struct radeon_device *rdev)
 				break;
 			case 27:
 				gb_tile_moden = (ARRAY_MODE(ARRAY_1D_TILED_THIN1) |
-						 MICRO_TILE_MODE_NEW(ADDR_SURF_ROTATED_MICRO_TILING));
+						 MICRO_TILE_MODE_NEW(ADDR_SURF_ROTATED_MICRO_TILING)) |
+						 PIPE_CONFIG(ADDR_SURF_P2);
 				break;
 			case 28:
 				gb_tile_moden = (ARRAY_MODE(ARRAY_PRT_2D_TILED_THIN1) |
-- 
1.8.4.rc3

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  parent reply	other threads:[~2013-09-18 13:39 UTC|newest]

Thread overview: 7+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2013-09-18 13:39 [PATCH 1/3] drm/radeon/cik: Fix printing of client name on VM protection fault Michel Dänzer
2013-09-18 13:39 ` [PATCH 2/3] drm/radeon/cik: Fix encoding of number of banks in tiling configuration info Michel Dänzer
2013-09-18 13:39 ` Michel Dänzer [this message]
2013-09-18 13:56   ` [PATCH 3/3] drm/radeon/cik: Program pipe configuration for 1D tiling modes as well Alex Deucher
2013-09-18 15:55     ` Michel Dänzer
2013-09-18 16:00       ` Alex Deucher
2013-09-18 15:44 ` [PATCH 1/3] drm/radeon/cik: Fix printing of client name on VM protection fault Alex Deucher

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