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From: Jani Nikula <jani.nikula@intel.com>
To: dri-devel@lists.freedesktop.org, intel-gfx@lists.freedesktop.org
Cc: jani.nikula@intel.com
Subject: [PATCH 2/2] drm/i915/dp: check eDP display control capability registers
Date: Fri, 15 Nov 2013 15:01:51 +0200	[thread overview]
Message-ID: <1384520511-24267-2-git-send-email-jani.nikula@intel.com> (raw)
In-Reply-To: <1384520511-24267-1-git-send-email-jani.nikula@intel.com>

Debug print the capabilities, and flag an error if the panel does not
support adjusting backlight through the BL_PWM_DIM pin, requiring
backlight control through DPCD.

I haven't seen such panels yet, but it's a matter of time. Give
ourselves a reminder when we need to fix this for real.

Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
 drivers/gpu/drm/i915/intel_dp.c |   14 ++++++++++++++
 1 file changed, 14 insertions(+)

diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index cbf33be..ea4f3d1 100644
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@ -2816,6 +2816,20 @@ intel_dp_get_dpcd(struct intel_dp *intel_dp)
 			dev_priv->psr.sink_support = true;
 			DRM_DEBUG_KMS("Detected EDP PSR Panel.\n");
 		}
+
+		if (intel_dp->dpcd[DP_EDP_CONFIGURATION_CAP] &
+		    DP_DPCD_DISPLAY_CONTROL_CAP) {
+			u8 ctrl[4] = { 0 };
+
+			intel_dp_aux_native_read(intel_dp, DP_EDP_REV,
+						 ctrl, sizeof(ctrl));
+			DRM_DEBUG_KMS("eDP DPCD CTRL %02x %02x %02x %02x\n",
+				      ctrl[0], ctrl[1], ctrl[2], ctrl[3]);
+
+			/* We don't support DPCD backlight control yet. */
+			if (ctrl[0] && (ctrl[1] & 1) && !(ctrl[2] & 1))
+				DRM_ERROR("eDP AUX backlight control only\n");
+		}
 	}
 
 	if (!(intel_dp->dpcd[DP_DOWNSTREAMPORT_PRESENT] &
-- 
1.7.9.5

  reply	other threads:[~2013-11-15 13:01 UTC|newest]

Thread overview: 10+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2013-11-15 13:01 [PATCH 1/2] drm/dp: add eDP 1.2 display control DPCD register definitions Jani Nikula
2013-11-15 13:01 ` Jani Nikula [this message]
2013-11-18 14:27   ` [PATCH 2/2] drm/i915/dp: check eDP display control capability registers Thierry Reding
2013-11-18 15:09     ` Alex Deucher
2013-11-18 15:26       ` Thierry Reding
2013-11-18 16:20         ` [Intel-gfx] " Daniel Vetter
2013-11-18 16:31           ` Thierry Reding
2013-11-18 16:38             ` Daniel Vetter
2013-11-19  8:37               ` Thierry Reding
2013-11-18 14:11 ` [PATCH 1/2] drm/dp: add eDP 1.2 display control DPCD register definitions Thierry Reding

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