From: Thierry Reding <thierry.reding-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> To: Stephen Warren <swarren-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org> Cc: linux-tegra-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org Subject: [PATCH 01/10] ARM: tegra: Add AS3722 PMIC on Venice2 Date: Thu, 19 Dec 2013 17:06:13 +0100 [thread overview] Message-ID: <1387469182-14398-2-git-send-email-treding@nvidia.com> (raw) In-Reply-To: <1387469182-14398-1-git-send-email-treding-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org> This also adds the vmmc-supply property to the SDMMC node on Venice2. Otherwise the core will turn the regulator off automatically because it is unused. Signed-off-by: Thierry Reding <treding-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org> --- Note: This was taken from a ChromeOS tree. --- arch/arm/boot/dts/tegra124-venice2.dts | 182 +++++++++++++++++++++++++++++++++ 1 file changed, 182 insertions(+) diff --git a/arch/arm/boot/dts/tegra124-venice2.dts b/arch/arm/boot/dts/tegra124-venice2.dts index d6bb25c78c62..5dc0c64b7682 100644 --- a/arch/arm/boot/dts/tegra124-venice2.dts +++ b/arch/arm/boot/dts/tegra124-venice2.dts @@ -392,6 +392,176 @@ i2c@7000d000 { status = "okay"; clock-frequency = <100000>; + + pmic: pmic@40 { + compatible = "ams,as3722"; + reg = <0x40>; + interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_LOW>; + + #interrupt-cells = <2>; + interrupt-controller; + + #gpio-cells = <2>; + gpio-controller; + + pinctrl-names = "default"; + pinctrl-0 = <&as3722_default>; + + as3722_default: pinmux { + gpio0 { + pins = "gpio0"; + function = "gpio"; + bias-pull-down; + }; + + gpio1_2_4_7 { + pins = "gpio1", "gpio2", "gpio4", + "gpio7"; + function = "gpio"; + bias-pull-up; + }; + + gpio3_6 { + pins = "gpio3", "gpio6"; + function = "gpio"; + bias-high-impedance; + }; + + gpio5 { + pins = "gpio5"; + function = "clk32k-out"; + bias-pull-up; + }; + }; + + regulators { + vsup-sd2-supply = <&sys_5v_reg>; + vsup-sd3-supply = <&sys_5v_reg>; + vsup-sd4-supply = <&sys_5v_reg>; + vsup-sd5-supply = <&sys_5v_reg>; + vin-ldo0-supply = <&as3722_sd2>; + vin-ldo1-6-supply = <&sys_5v_reg>; + vin-ldo2-5-7-supply = <&vddio_1v8>; + vin-ldo3-4-supply = <&sys_5v_reg>; + vin-ldo9-10-supply = <&sys_5v_reg>; + vin-ldo11-supply = <&sys_5v_reg>; + + sd0 { + regulator-name = "vdd_cpu"; + regulator-min-microvolt = <700000>; + regulator-max-microvolt = <1350000>; + regulator-always-on; + ams,ext-control = <2>; + }; + + sd1 { + regulator-name = "vdd_core"; + regulator-min-microvolt = <700000>; + regulator-max-microvolt = <1350000>; + regulator-max-microamp = <3500000>; + regulator-always-on; + ams,ext-control = <1>; + }; + + as3722_sd2: sd2 { + regulator-name = "vddio_ddr"; + regulator-min-microvolt = <1350000>; + regulator-max-microvolt = <1350000>; + regulator-always-on; + }; + + sd4 { + regulator-name = "avdd-hdmi-pex"; + regulator-min-microvolt = <1050000>; + regulator-max-microvolt = <1050000>; + }; + + vddio_1v8: sd5 { + regulator-name = "vdd-1v8"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + }; + + sd6 { + regulator-name = "vdd_gpu"; + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <1200000>; + regulator-boot-on; + regulator-always-on; + }; + + ldo0 { + regulator-name = "avdd-pll"; + regulator-min-microvolt = <1050000>; + regulator-max-microvolt = <1050000>; + regulator-always-on; + ams,ext-control = <1>; + }; + + ldo1 { + regulator-name = "vdd_cam"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + }; + + ldo2 { + regulator-name = "vddio_hsic"; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + }; + + ldo3 { + regulator-name = "vdd_rtc"; + regulator-min-microvolt = <1000000>; + regulator-max-microvolt = <1000000>; + regulator-always-on; + ams,enable-tracking; + }; + + ldo4 { + regulator-name = "avdd_cam"; + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <2800000>; + }; + + ldo5 { + regulator-name = "vdig"; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + }; + + ldo6 { + regulator-name = "vddio_sdmmc"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + }; + + ldo7 { + regulator-name = "vdd_cam1"; + regulator-min-microvolt = <1050000>; + regulator-max-microvolt = <1050000>; + }; + + ldo9 { + regulator-name = "avdd"; + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <2800000>; + }; + + ldo10 { + regulator-name = "avdd_af1_cam"; + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <2800000>; + }; + + ldo11 { + regulator-name = "vpp_fuse"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + }; + }; + }; }; pmc@7000e400 { @@ -436,6 +606,18 @@ }; }; + regulators { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <0>; + + sys_5v_reg: regulator@0 { + compatible = "regulator-fixed"; + reg = <0>; + regulator-name = "sys_5v"; + }; + }; + sound { compatible = "nvidia,tegra-audio-max98090-venice2", "nvidia,tegra-audio-max98090"; -- 1.8.4.2
WARNING: multiple messages have this Message-ID (diff)
From: thierry.reding@gmail.com (Thierry Reding) To: linux-arm-kernel@lists.infradead.org Subject: [PATCH 01/10] ARM: tegra: Add AS3722 PMIC on Venice2 Date: Thu, 19 Dec 2013 17:06:13 +0100 [thread overview] Message-ID: <1387469182-14398-2-git-send-email-treding@nvidia.com> (raw) In-Reply-To: <1387469182-14398-1-git-send-email-treding@nvidia.com> This also adds the vmmc-supply property to the SDMMC node on Venice2. Otherwise the core will turn the regulator off automatically because it is unused. Signed-off-by: Thierry Reding <treding@nvidia.com> --- Note: This was taken from a ChromeOS tree. --- arch/arm/boot/dts/tegra124-venice2.dts | 182 +++++++++++++++++++++++++++++++++ 1 file changed, 182 insertions(+) diff --git a/arch/arm/boot/dts/tegra124-venice2.dts b/arch/arm/boot/dts/tegra124-venice2.dts index d6bb25c78c62..5dc0c64b7682 100644 --- a/arch/arm/boot/dts/tegra124-venice2.dts +++ b/arch/arm/boot/dts/tegra124-venice2.dts @@ -392,6 +392,176 @@ i2c at 7000d000 { status = "okay"; clock-frequency = <100000>; + + pmic: pmic at 40 { + compatible = "ams,as3722"; + reg = <0x40>; + interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_LOW>; + + #interrupt-cells = <2>; + interrupt-controller; + + #gpio-cells = <2>; + gpio-controller; + + pinctrl-names = "default"; + pinctrl-0 = <&as3722_default>; + + as3722_default: pinmux { + gpio0 { + pins = "gpio0"; + function = "gpio"; + bias-pull-down; + }; + + gpio1_2_4_7 { + pins = "gpio1", "gpio2", "gpio4", + "gpio7"; + function = "gpio"; + bias-pull-up; + }; + + gpio3_6 { + pins = "gpio3", "gpio6"; + function = "gpio"; + bias-high-impedance; + }; + + gpio5 { + pins = "gpio5"; + function = "clk32k-out"; + bias-pull-up; + }; + }; + + regulators { + vsup-sd2-supply = <&sys_5v_reg>; + vsup-sd3-supply = <&sys_5v_reg>; + vsup-sd4-supply = <&sys_5v_reg>; + vsup-sd5-supply = <&sys_5v_reg>; + vin-ldo0-supply = <&as3722_sd2>; + vin-ldo1-6-supply = <&sys_5v_reg>; + vin-ldo2-5-7-supply = <&vddio_1v8>; + vin-ldo3-4-supply = <&sys_5v_reg>; + vin-ldo9-10-supply = <&sys_5v_reg>; + vin-ldo11-supply = <&sys_5v_reg>; + + sd0 { + regulator-name = "vdd_cpu"; + regulator-min-microvolt = <700000>; + regulator-max-microvolt = <1350000>; + regulator-always-on; + ams,ext-control = <2>; + }; + + sd1 { + regulator-name = "vdd_core"; + regulator-min-microvolt = <700000>; + regulator-max-microvolt = <1350000>; + regulator-max-microamp = <3500000>; + regulator-always-on; + ams,ext-control = <1>; + }; + + as3722_sd2: sd2 { + regulator-name = "vddio_ddr"; + regulator-min-microvolt = <1350000>; + regulator-max-microvolt = <1350000>; + regulator-always-on; + }; + + sd4 { + regulator-name = "avdd-hdmi-pex"; + regulator-min-microvolt = <1050000>; + regulator-max-microvolt = <1050000>; + }; + + vddio_1v8: sd5 { + regulator-name = "vdd-1v8"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + }; + + sd6 { + regulator-name = "vdd_gpu"; + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <1200000>; + regulator-boot-on; + regulator-always-on; + }; + + ldo0 { + regulator-name = "avdd-pll"; + regulator-min-microvolt = <1050000>; + regulator-max-microvolt = <1050000>; + regulator-always-on; + ams,ext-control = <1>; + }; + + ldo1 { + regulator-name = "vdd_cam"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + }; + + ldo2 { + regulator-name = "vddio_hsic"; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + }; + + ldo3 { + regulator-name = "vdd_rtc"; + regulator-min-microvolt = <1000000>; + regulator-max-microvolt = <1000000>; + regulator-always-on; + ams,enable-tracking; + }; + + ldo4 { + regulator-name = "avdd_cam"; + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <2800000>; + }; + + ldo5 { + regulator-name = "vdig"; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + }; + + ldo6 { + regulator-name = "vddio_sdmmc"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + }; + + ldo7 { + regulator-name = "vdd_cam1"; + regulator-min-microvolt = <1050000>; + regulator-max-microvolt = <1050000>; + }; + + ldo9 { + regulator-name = "avdd"; + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <2800000>; + }; + + ldo10 { + regulator-name = "avdd_af1_cam"; + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <2800000>; + }; + + ldo11 { + regulator-name = "vpp_fuse"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + }; + }; + }; }; pmc at 7000e400 { @@ -436,6 +606,18 @@ }; }; + regulators { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <0>; + + sys_5v_reg: regulator at 0 { + compatible = "regulator-fixed"; + reg = <0>; + regulator-name = "sys_5v"; + }; + }; + sound { compatible = "nvidia,tegra-audio-max98090-venice2", "nvidia,tegra-audio-max98090"; -- 1.8.4.2
next prev parent reply other threads:[~2013-12-19 16:06 UTC|newest] Thread overview: 62+ messages / expand[flat|nested] mbox.gz Atom feed top 2013-12-19 16:06 [PATCH 00/10] ARM: tegra: Enable a bunch of functionality on Venice2 Thierry Reding 2013-12-19 16:06 ` Thierry Reding [not found] ` <1387469182-14398-1-git-send-email-treding-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org> 2013-12-19 16:06 ` Thierry Reding [this message] 2013-12-19 16:06 ` [PATCH 01/10] ARM: tegra: Add AS3722 PMIC " Thierry Reding [not found] ` <1387469182-14398-2-git-send-email-treding-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org> 2013-12-19 20:24 ` Stephen Warren 2013-12-19 20:24 ` Stephen Warren [not found] ` <52B355EC.9040306-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org> 2013-12-20 6:53 ` Laxman Dewangan 2013-12-20 6:53 ` Laxman Dewangan [not found] ` <52B3E968.8090906-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org> 2013-12-20 10:25 ` Thierry Reding 2013-12-20 10:25 ` Thierry Reding [not found] ` <20131220102542.GJ27787-AwZRO8vwLAwmlAP/+Wk3EA@public.gmane.org> 2013-12-20 10:46 ` Laxman Dewangan 2013-12-20 10:46 ` Laxman Dewangan [not found] ` <52B41FEA.7020608-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org> 2013-12-20 16:57 ` Stephen Warren 2013-12-20 16:57 ` Stephen Warren [not found] ` <52B476EA.2040401-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org> 2013-12-20 17:25 ` Laxman Dewangan 2013-12-20 17:25 ` Laxman Dewangan 2013-12-19 21:47 ` Stephen Warren 2013-12-19 21:47 ` Stephen Warren [not found] ` <52B3695D.70601-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org> 2013-12-20 11:14 ` Thierry Reding 2013-12-20 11:14 ` Thierry Reding [not found] ` <20131220111442.GK27787-AwZRO8vwLAwmlAP/+Wk3EA@public.gmane.org> 2013-12-20 17:02 ` Stephen Warren 2013-12-20 17:02 ` Stephen Warren 2013-12-19 16:06 ` [PATCH 02/10] ARM: tegra: Hook up SDMMC3 power-supply " Thierry Reding 2013-12-19 16:06 ` Thierry Reding 2013-12-19 16:06 ` [PATCH 03/10] ARM: tegra: Add Tegra124 host1x support Thierry Reding 2013-12-19 16:06 ` Thierry Reding 2013-12-19 16:06 ` [PATCH 04/10] ARM: tegra: Add Tegra124 eDP support Thierry Reding 2013-12-19 16:06 ` Thierry Reding [not found] ` <1387469182-14398-5-git-send-email-treding-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org> 2013-12-19 20:46 ` Stephen Warren 2013-12-19 20:46 ` Stephen Warren [not found] ` <52B35B15.4090008-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org> 2013-12-20 11:17 ` Thierry Reding 2013-12-20 11:17 ` Thierry Reding 2013-12-19 16:06 ` [PATCH 05/10] ARM: tegra: Enable eDP for Venice2 Thierry Reding 2013-12-19 16:06 ` Thierry Reding [not found] ` <1387469182-14398-6-git-send-email-treding-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org> 2013-12-19 21:40 ` Stephen Warren 2013-12-19 21:40 ` Stephen Warren [not found] ` <52B367C7.9010301-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org> 2013-12-20 10:20 ` Thierry Reding 2013-12-20 10:20 ` Thierry Reding [not found] ` <20131220102024.GI27787-AwZRO8vwLAwmlAP/+Wk3EA@public.gmane.org> 2013-12-20 17:01 ` Stephen Warren 2013-12-20 17:01 ` Stephen Warren 2013-12-19 16:06 ` [PATCH 06/10] ARM: tegra: Add SPI controller nodes for Tegra124 Thierry Reding 2013-12-19 16:06 ` Thierry Reding [not found] ` <1387469182-14398-7-git-send-email-treding-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org> 2013-12-19 20:38 ` Stephen Warren 2013-12-19 20:38 ` Stephen Warren [not found] ` <52B35944.8090307-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org> 2013-12-20 11:15 ` Thierry Reding 2013-12-20 11:15 ` Thierry Reding 2013-12-19 16:06 ` [PATCH 07/10] ARM: tegra: Enable Venice2 keyboard Thierry Reding 2013-12-19 16:06 ` Thierry Reding [not found] ` <1387469182-14398-8-git-send-email-treding-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org> 2013-12-20 17:56 ` Stephen Warren 2013-12-20 17:56 ` Stephen Warren 2013-12-19 16:06 ` [PATCH 08/10] ARM: tegra: Enable power key on Venice2 Thierry Reding 2013-12-19 16:06 ` Thierry Reding 2013-12-19 16:06 ` [PATCH 09/10] ARM: tegra: Add Tegra124 USB support Thierry Reding 2013-12-19 16:06 ` Thierry Reding 2013-12-19 16:06 ` [PATCH 10/10] ARM: tegra: Enable USB on Venice2 Thierry Reding 2013-12-19 16:06 ` Thierry Reding [not found] ` <1387469182-14398-11-git-send-email-treding-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org> 2013-12-19 21:37 ` Stephen Warren 2013-12-19 21:37 ` Stephen Warren [not found] ` <52B36720.8080205-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org> 2013-12-20 2:59 ` Jim Lin 2013-12-20 2:59 ` Jim Lin 2013-12-20 11:53 ` Thierry Reding 2013-12-20 11:53 ` Thierry Reding
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