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From: Shobhit Kumar <shobhit.kumar@intel.com>
To: intel-gfx <intel-gfx@lists.freedesktop.org>
Cc: Jani Nikula <jani.nikula@intel.com>,
	Daniel Vetter <daniel.vetter@intel.com>
Subject: [PATCH 3/7] drm/i915: Disable DPOunit clock gating
Date: Wed,  9 Apr 2014 13:59:32 +0530	[thread overview]
Message-ID: <1397032176-11988-4-git-send-email-shobhit.kumar@intel.com> (raw)
In-Reply-To: <1397032176-11988-1-git-send-email-shobhit.kumar@intel.com>

Otherwise, this can stall pipe. We also need DPLL REFA always
enabled

Signed-off-by: Shobhit Kumar <shobhit.kumar@intel.com>
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
---
 drivers/gpu/drm/i915/intel_dsi.c | 26 ++++++++++++++++++++++++--
 1 file changed, 24 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_dsi.c b/drivers/gpu/drm/i915/intel_dsi.c
index 569e6c6..4793a5b 100644
--- a/drivers/gpu/drm/i915/intel_dsi.c
+++ b/drivers/gpu/drm/i915/intel_dsi.c
@@ -163,16 +163,31 @@ static void intel_dsi_enable(struct intel_encoder *encoder)
 
 static void intel_dsi_pre_enable(struct intel_encoder *encoder)
 {
+	struct drm_device *dev = encoder->base.dev;
+	struct drm_i915_private *dev_priv = dev->dev_private;
 	struct intel_dsi *intel_dsi = enc_to_intel_dsi(&encoder->base);
+	struct intel_crtc *intel_crtc = to_intel_crtc(encoder->base.crtc);
+	enum pipe pipe = intel_crtc->pipe;
+	u32 tmp;
 
 	DRM_DEBUG_KMS("\n");
 
-	if (intel_dsi->dev.dev_ops->panel_reset)
-		intel_dsi->dev.dev_ops->panel_reset(&intel_dsi->dev);
+	/* Disable DPOunit clock gating, can stall pipe
+	 * and we need DPLL REFA always enabled */
+	tmp = I915_READ(DPLL(pipe));
+	tmp |= DPLL_REFA_CLK_ENABLE_VLV;
+	I915_WRITE(DPLL(pipe), tmp);
+
+	tmp = I915_READ(DSPCLK_GATE_D);
+	tmp |= DPOUNIT_CLOCK_GATE_DISABLE;
+	I915_WRITE(DSPCLK_GATE_D, tmp);
 
 	/* put device in ready state */
 	intel_dsi_device_ready(encoder);
 
+	if (intel_dsi->dev.dev_ops->panel_reset)
+		intel_dsi->dev.dev_ops->panel_reset(&intel_dsi->dev);
+
 	if (intel_dsi->dev.dev_ops->send_otp_cmds)
 		intel_dsi->dev.dev_ops->send_otp_cmds(&intel_dsi->dev);
 
@@ -251,14 +266,21 @@ static void intel_dsi_clear_device_ready(struct intel_encoder *encoder)
 
 	vlv_disable_dsi_pll(encoder);
 }
+
 static void intel_dsi_post_disable(struct intel_encoder *encoder)
 {
+	struct drm_i915_private *dev_priv = encoder->base.dev->dev_private;
 	struct intel_dsi *intel_dsi = enc_to_intel_dsi(&encoder->base);
+	u32 val;
 
 	DRM_DEBUG_KMS("\n");
 
 	intel_dsi_clear_device_ready(encoder);
 
+	val = I915_READ(DSPCLK_GATE_D);
+	val &= ~DPOUNIT_CLOCK_GATE_DISABLE;
+	I915_WRITE(DSPCLK_GATE_D, val);
+
 	if (intel_dsi->dev.dev_ops->disable_panel_power)
 		intel_dsi->dev.dev_ops->disable_panel_power(&intel_dsi->dev);
 }
-- 
1.8.3.2

  parent reply	other threads:[~2014-04-09  8:31 UTC|newest]

Thread overview: 11+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-04-09  8:29 [PATCH 0/7] Updated MIPI sequence for BYT Shobhit Kumar
2014-04-09  8:29 ` [PATCH 1/7] drm/i915: Program Rcomp and band gap reset everytime we resume from power gate Shobhit Kumar
2014-04-09  8:29 ` [PATCH 2/7] drm/i915: Enable MIPI port before the plane and pipe enable Shobhit Kumar
2014-04-09  8:29 ` Shobhit Kumar [this message]
2014-04-09  8:29 ` [PATCH 4/7] drm/i915: Parameterize the Clockstop and escape_clk_div Shobhit Kumar
2014-04-09  8:29 ` [PATCH 5/7] drm/i915: Panel commands can be sent only when clock is in LP11 Shobhit Kumar
2014-04-09  8:29 ` [PATCH 6/7] drm/i915: Send DPI command explicitely in LP mode Shobhit Kumar
2014-04-09  8:29 ` [PATCH 7/7] drm/i915: Enable RANDOM resolution support for MIPI panels Shobhit Kumar
2014-04-09 14:51 ` [PATCH 0/7] Updated MIPI sequence for BYT Daniel Vetter
2014-04-09 16:01   ` Kumar, Shobhit
2014-04-09 16:50     ` Daniel Vetter

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