From: Mihai Caraman <mihai.caraman@freescale.com>
To: <kvm-ppc@vger.kernel.org>
Cc: <kvm@vger.kernel.org>, <linuxppc-dev@lists.ozlabs.org>,
Mihai Caraman <mihai.caraman@freescale.com>
Subject: [PATCH 2/4] KVM: PPC: Book3e: Add TLBSEL/TSIZE defines for MAS0/1
Date: Mon, 2 Jun 2014 18:50:14 +0300 [thread overview]
Message-ID: <1401724216-26486-3-git-send-email-mihai.caraman@freescale.com> (raw)
In-Reply-To: <1401724216-26486-1-git-send-email-mihai.caraman@freescale.com>
Add mising defines MAS0_GET_TLBSEL() and MAS1_GET_TSIZE() for Book3E.
Signed-off-by: Mihai Caraman <mihai.caraman@freescale.com>
---
v3:
- no change
v2:
- no change
arch/powerpc/include/asm/mmu-book3e.h | 7 ++++++-
1 file changed, 6 insertions(+), 1 deletion(-)
diff --git a/arch/powerpc/include/asm/mmu-book3e.h b/arch/powerpc/include/asm/mmu-book3e.h
index 901dac6..60a949a 100644
--- a/arch/powerpc/include/asm/mmu-book3e.h
+++ b/arch/powerpc/include/asm/mmu-book3e.h
@@ -40,7 +40,11 @@
/* MAS registers bit definitions */
-#define MAS0_TLBSEL(x) (((x) << 28) & 0x30000000)
+#define MAS0_TLBSEL_MASK 0x30000000
+#define MAS0_TLBSEL_SHIFT 28
+#define MAS0_TLBSEL(x) (((x) << MAS0_TLBSEL_SHIFT) & MAS0_TLBSEL_MASK)
+#define MAS0_GET_TLBSEL(mas0) (((mas0) & MAS0_TLBSEL_MASK) >> \
+ MAS0_TLBSEL_SHIFT)
#define MAS0_ESEL_MASK 0x0FFF0000
#define MAS0_ESEL_SHIFT 16
#define MAS0_ESEL(x) (((x) << MAS0_ESEL_SHIFT) & MAS0_ESEL_MASK)
@@ -58,6 +62,7 @@
#define MAS1_TSIZE_MASK 0x00000f80
#define MAS1_TSIZE_SHIFT 7
#define MAS1_TSIZE(x) (((x) << MAS1_TSIZE_SHIFT) & MAS1_TSIZE_MASK)
+#define MAS1_GET_TSIZE(mas1) (((mas1) & MAS1_TSIZE_MASK) >> MAS1_TSIZE_SHIFT)
#define MAS2_EPN (~0xFFFUL)
#define MAS2_X0 0x00000040
--
1.7.11.7
WARNING: multiple messages have this Message-ID (diff)
From: Mihai Caraman <mihai.caraman@freescale.com>
To: <kvm-ppc@vger.kernel.org>
Cc: Mihai Caraman <mihai.caraman@freescale.com>,
linuxppc-dev@lists.ozlabs.org, kvm@vger.kernel.org
Subject: [PATCH 2/4] KVM: PPC: Book3e: Add TLBSEL/TSIZE defines for MAS0/1
Date: Mon, 2 Jun 2014 18:50:14 +0300 [thread overview]
Message-ID: <1401724216-26486-3-git-send-email-mihai.caraman@freescale.com> (raw)
In-Reply-To: <1401724216-26486-1-git-send-email-mihai.caraman@freescale.com>
Add mising defines MAS0_GET_TLBSEL() and MAS1_GET_TSIZE() for Book3E.
Signed-off-by: Mihai Caraman <mihai.caraman@freescale.com>
---
v3:
- no change
v2:
- no change
arch/powerpc/include/asm/mmu-book3e.h | 7 ++++++-
1 file changed, 6 insertions(+), 1 deletion(-)
diff --git a/arch/powerpc/include/asm/mmu-book3e.h b/arch/powerpc/include/asm/mmu-book3e.h
index 901dac6..60a949a 100644
--- a/arch/powerpc/include/asm/mmu-book3e.h
+++ b/arch/powerpc/include/asm/mmu-book3e.h
@@ -40,7 +40,11 @@
/* MAS registers bit definitions */
-#define MAS0_TLBSEL(x) (((x) << 28) & 0x30000000)
+#define MAS0_TLBSEL_MASK 0x30000000
+#define MAS0_TLBSEL_SHIFT 28
+#define MAS0_TLBSEL(x) (((x) << MAS0_TLBSEL_SHIFT) & MAS0_TLBSEL_MASK)
+#define MAS0_GET_TLBSEL(mas0) (((mas0) & MAS0_TLBSEL_MASK) >> \
+ MAS0_TLBSEL_SHIFT)
#define MAS0_ESEL_MASK 0x0FFF0000
#define MAS0_ESEL_SHIFT 16
#define MAS0_ESEL(x) (((x) << MAS0_ESEL_SHIFT) & MAS0_ESEL_MASK)
@@ -58,6 +62,7 @@
#define MAS1_TSIZE_MASK 0x00000f80
#define MAS1_TSIZE_SHIFT 7
#define MAS1_TSIZE(x) (((x) << MAS1_TSIZE_SHIFT) & MAS1_TSIZE_MASK)
+#define MAS1_GET_TSIZE(mas1) (((mas1) & MAS1_TSIZE_MASK) >> MAS1_TSIZE_SHIFT)
#define MAS2_EPN (~0xFFFUL)
#define MAS2_X0 0x00000040
--
1.7.11.7
WARNING: multiple messages have this Message-ID (diff)
From: Mihai Caraman <mihai.caraman@freescale.com>
To: kvm-ppc@vger.kernel.org
Cc: kvm@vger.kernel.org, linuxppc-dev@lists.ozlabs.org,
Mihai Caraman <mihai.caraman@freescale.com>
Subject: [PATCH 2/4] KVM: PPC: Book3e: Add TLBSEL/TSIZE defines for MAS0/1
Date: Mon, 02 Jun 2014 15:50:14 +0000 [thread overview]
Message-ID: <1401724216-26486-3-git-send-email-mihai.caraman@freescale.com> (raw)
In-Reply-To: <1401724216-26486-1-git-send-email-mihai.caraman@freescale.com>
Add mising defines MAS0_GET_TLBSEL() and MAS1_GET_TSIZE() for Book3E.
Signed-off-by: Mihai Caraman <mihai.caraman@freescale.com>
---
v3:
- no change
v2:
- no change
arch/powerpc/include/asm/mmu-book3e.h | 7 ++++++-
1 file changed, 6 insertions(+), 1 deletion(-)
diff --git a/arch/powerpc/include/asm/mmu-book3e.h b/arch/powerpc/include/asm/mmu-book3e.h
index 901dac6..60a949a 100644
--- a/arch/powerpc/include/asm/mmu-book3e.h
+++ b/arch/powerpc/include/asm/mmu-book3e.h
@@ -40,7 +40,11 @@
/* MAS registers bit definitions */
-#define MAS0_TLBSEL(x) (((x) << 28) & 0x30000000)
+#define MAS0_TLBSEL_MASK 0x30000000
+#define MAS0_TLBSEL_SHIFT 28
+#define MAS0_TLBSEL(x) (((x) << MAS0_TLBSEL_SHIFT) & MAS0_TLBSEL_MASK)
+#define MAS0_GET_TLBSEL(mas0) (((mas0) & MAS0_TLBSEL_MASK) >> \
+ MAS0_TLBSEL_SHIFT)
#define MAS0_ESEL_MASK 0x0FFF0000
#define MAS0_ESEL_SHIFT 16
#define MAS0_ESEL(x) (((x) << MAS0_ESEL_SHIFT) & MAS0_ESEL_MASK)
@@ -58,6 +62,7 @@
#define MAS1_TSIZE_MASK 0x00000f80
#define MAS1_TSIZE_SHIFT 7
#define MAS1_TSIZE(x) (((x) << MAS1_TSIZE_SHIFT) & MAS1_TSIZE_MASK)
+#define MAS1_GET_TSIZE(mas1) (((mas1) & MAS1_TSIZE_MASK) >> MAS1_TSIZE_SHIFT)
#define MAS2_EPN (~0xFFFUL)
#define MAS2_X0 0x00000040
--
1.7.11.7
next prev parent reply other threads:[~2014-06-02 15:50 UTC|newest]
Thread overview: 27+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-06-02 15:50 [PATCH 0/4 v3] KVM: PPC: Read guest instruction from kvmppc_get_last_inst() Mihai Caraman
2014-06-02 15:50 ` Mihai Caraman
2014-06-02 15:50 ` Mihai Caraman
2014-06-02 15:50 ` [PATCH 1/4 v3] KVM: PPC: e500mc: Revert "add load inst fixup" Mihai Caraman
2014-06-02 15:50 ` Mihai Caraman
2014-06-02 15:50 ` Mihai Caraman
2014-06-02 15:50 ` Mihai Caraman [this message]
2014-06-02 15:50 ` [PATCH 2/4] KVM: PPC: Book3e: Add TLBSEL/TSIZE defines for MAS0/1 Mihai Caraman
2014-06-02 15:50 ` Mihai Caraman
2014-06-02 15:50 ` [PATCH 3/4 v3] KVM: PPC: Alow kvmppc_get_last_inst() to fail Mihai Caraman
2014-06-02 15:50 ` Mihai Caraman
2014-06-02 15:50 ` Mihai Caraman
2014-06-12 15:15 ` Alexander Graf
2014-06-12 15:15 ` Alexander Graf
2014-06-12 15:15 ` Alexander Graf
2014-06-02 15:50 ` [PATCH 4/4 v3] KVM: PPC: Bookehv: Get vcpu's last instruction for emulation Mihai Caraman
2014-06-02 15:50 ` Mihai Caraman
2014-06-02 15:50 ` Mihai Caraman
2014-06-12 16:04 ` Alexander Graf
2014-06-12 16:04 ` Alexander Graf
2014-06-12 16:04 ` Alexander Graf
2014-06-13 21:56 ` Scott Wood
2014-06-13 21:56 ` Scott Wood
2014-06-13 21:56 ` Scott Wood
-- strict thread matches above, loose matches on Subject: below --
2014-02-20 16:30 [PATCH 1/4] KVM: PPC: e500mc: Revert "add load inst fixup" Mihai Caraman
2014-02-20 16:30 ` [PATCH 2/4] KVM: PPC: Book3e: Add TLBSEL/TSIZE defines for MAS0/1 Mihai Caraman
2014-02-20 16:30 ` Mihai Caraman
2014-02-20 16:30 ` Mihai Caraman
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