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From: Thierry Reding <thierry.reding@gmail.com>
To: Linus Walleij <linus.walleij@linaro.org>,
	Stephen Warren <swarren@wwwdotorg.org>
Cc: Rob Herring <robh+dt@kernel.org>, Pawel Moll <pawel.moll@arm.com>,
	Mark Rutland <mark.rutland@arm.com>,
	Ian Campbell <ijc+devicetree@hellion.org.uk>,
	Kumar Gala <galak@codeaurora.org>,
	Andrew Bresticker <abrestic@chromium.org>,
	devicetree@vger.kernel.org, linux-tegra@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org
Subject: [PATCH v2 3/4] ARM: tegra: tegra124: Add XUSB pad controller
Date: Tue, 10 Jun 2014 13:11:47 +0200	[thread overview]
Message-ID: <1402398708-10722-3-git-send-email-thierry.reding@gmail.com> (raw)
In-Reply-To: <1402398708-10722-1-git-send-email-thierry.reding@gmail.com>

From: Thierry Reding <treding@nvidia.com>

The device tree node in the SoC file contains only the resources (such
as registers, resets, ...) but none of the lane assignment information
since that's board specific and belongs in the board file.

Signed-off-by: Thierry Reding <treding@nvidia.com>
---
Changes in v2:
- include dt-bindings/pinctrl/pinctrl-tegra-xusb.h so that board files
  don't have to include it explicitly
- remove unneeded #address-cells/#size-cells = <0>
- add padctl label for XUSB pad controller node

 arch/arm/boot/dts/tegra124.dtsi | 10 ++++++++++
 1 file changed, 10 insertions(+)

diff --git a/arch/arm/boot/dts/tegra124.dtsi b/arch/arm/boot/dts/tegra124.dtsi
index 6e6bc4e8185c..b7cb944b2faa 100644
--- a/arch/arm/boot/dts/tegra124.dtsi
+++ b/arch/arm/boot/dts/tegra124.dtsi
@@ -1,6 +1,7 @@
 #include <dt-bindings/clock/tegra124-car.h>
 #include <dt-bindings/gpio/tegra-gpio.h>
 #include <dt-bindings/pinctrl/pinctrl-tegra.h>
+#include <dt-bindings/pinctrl/pinctrl-tegra-xusb.h>
 #include <dt-bindings/interrupt-controller/arm-gic.h>
 
 #include "skeleton.dtsi"
@@ -449,6 +450,15 @@
 		clock-names = "pclk", "clk32k_in";
 	};
 
+	padctl: padctl@0,7009f000 {
+		compatible = "nvidia,tegra124-xusb-padctl";
+		reg = <0x0 0x7009f000 0x0 0x1000>;
+		resets = <&tegra_car 142>;
+		reset-names = "padctl";
+
+		#phy-cells = <1>;
+	};
+
 	sdhci@0,700b0000 {
 		compatible = "nvidia,tegra124-sdhci";
 		reg = <0x0 0x700b0000 0x0 0x200>;
-- 
1.9.2

WARNING: multiple messages have this Message-ID (diff)
From: thierry.reding@gmail.com (Thierry Reding)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v2 3/4] ARM: tegra: tegra124: Add XUSB pad controller
Date: Tue, 10 Jun 2014 13:11:47 +0200	[thread overview]
Message-ID: <1402398708-10722-3-git-send-email-thierry.reding@gmail.com> (raw)
In-Reply-To: <1402398708-10722-1-git-send-email-thierry.reding@gmail.com>

From: Thierry Reding <treding@nvidia.com>

The device tree node in the SoC file contains only the resources (such
as registers, resets, ...) but none of the lane assignment information
since that's board specific and belongs in the board file.

Signed-off-by: Thierry Reding <treding@nvidia.com>
---
Changes in v2:
- include dt-bindings/pinctrl/pinctrl-tegra-xusb.h so that board files
  don't have to include it explicitly
- remove unneeded #address-cells/#size-cells = <0>
- add padctl label for XUSB pad controller node

 arch/arm/boot/dts/tegra124.dtsi | 10 ++++++++++
 1 file changed, 10 insertions(+)

diff --git a/arch/arm/boot/dts/tegra124.dtsi b/arch/arm/boot/dts/tegra124.dtsi
index 6e6bc4e8185c..b7cb944b2faa 100644
--- a/arch/arm/boot/dts/tegra124.dtsi
+++ b/arch/arm/boot/dts/tegra124.dtsi
@@ -1,6 +1,7 @@
 #include <dt-bindings/clock/tegra124-car.h>
 #include <dt-bindings/gpio/tegra-gpio.h>
 #include <dt-bindings/pinctrl/pinctrl-tegra.h>
+#include <dt-bindings/pinctrl/pinctrl-tegra-xusb.h>
 #include <dt-bindings/interrupt-controller/arm-gic.h>
 
 #include "skeleton.dtsi"
@@ -449,6 +450,15 @@
 		clock-names = "pclk", "clk32k_in";
 	};
 
+	padctl: padctl at 0,7009f000 {
+		compatible = "nvidia,tegra124-xusb-padctl";
+		reg = <0x0 0x7009f000 0x0 0x1000>;
+		resets = <&tegra_car 142>;
+		reset-names = "padctl";
+
+		#phy-cells = <1>;
+	};
+
 	sdhci at 0,700b0000 {
 		compatible = "nvidia,tegra124-sdhci";
 		reg = <0x0 0x700b0000 0x0 0x200>;
-- 
1.9.2

  parent reply	other threads:[~2014-06-10 11:11 UTC|newest]

Thread overview: 28+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-06-10 11:11 [PATCH v2 1/4] of: Add NVIDIA Tegra XUSB pad controller binding Thierry Reding
2014-06-10 11:11 ` Thierry Reding
2014-06-10 11:11 ` Thierry Reding
     [not found] ` <1402398708-10722-1-git-send-email-thierry.reding-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
2014-06-10 11:11   ` [PATCH v2 2/4] pinctrl: Add NVIDIA Tegra XUSB pad controller support Thierry Reding
2014-06-10 11:11     ` Thierry Reding
2014-06-10 11:11     ` Thierry Reding
2014-06-11 20:23     ` Andrew Bresticker
2014-06-11 20:23       ` Andrew Bresticker
2014-06-11 20:23       ` Andrew Bresticker
     [not found]       ` <CAL1qeaGKUGjSzriDGptR+h23+bS3ZWuStz6koPURCstkFbEjNA-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2014-06-11 21:06         ` Stephen Warren
2014-06-11 21:06           ` Stephen Warren
2014-06-11 21:06           ` Stephen Warren
2014-06-12  7:22       ` Thierry Reding
2014-06-12  7:22         ` Thierry Reding
2014-06-12  7:22         ` Thierry Reding
     [not found]     ` <1402398708-10722-2-git-send-email-thierry.reding-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
2014-06-12 20:39       ` Stephen Warren
2014-06-12 20:39         ` Stephen Warren
2014-06-12 20:39         ` Stephen Warren
2014-07-04 23:04         ` Linus Walleij
2014-07-04 23:04           ` Linus Walleij
2014-07-04 23:04           ` Linus Walleij
2014-07-04 23:01   ` [PATCH v2 1/4] of: Add NVIDIA Tegra XUSB pad controller binding Linus Walleij
2014-07-04 23:01     ` Linus Walleij
2014-07-04 23:01     ` Linus Walleij
2014-06-10 11:11 ` Thierry Reding [this message]
2014-06-10 11:11   ` [PATCH v2 3/4] ARM: tegra: tegra124: Add XUSB pad controller Thierry Reding
2014-06-10 11:11 ` [PATCH v2 4/4] ARM: tegra: jetson-tk1: " Thierry Reding
2014-06-10 11:11   ` Thierry Reding

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