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From: Rahul Sharma <rahul.sharma@samsung.com>
To: dri-devel@lists.freedesktop.org
Cc: linux-samsung-soc@vger.kernel.org, inki.dae@samsung.com,
	kgene.kim@samsung.com, joshi@samsung.com, r.sh.open@gmail.com,
	Rahul Sharma <rahul.sharma@samsung.com>
Subject: [PATCH 2/5] drm/exynos: stop mixer before gating clocks during poweroff
Date: Wed, 18 Jun 2014 17:04:50 +0530	[thread overview]
Message-ID: <1403091293-15058-3-git-send-email-rahul.sharma@samsung.com> (raw)
In-Reply-To: <1403091293-15058-1-git-send-email-rahul.sharma@samsung.com>

Mixer should be power gated only after it is gracefully stopped.
The recommended sequence is to Stop the mixer and wait till
it enters to IDLE state before gating the clocks and power to
the mixer.

Signed-off-by: Rahul Sharma <rahul.sharma@samsung.com>
---
 drivers/gpu/drm/exynos/exynos_mixer.c |   15 +++++++++++++++
 drivers/gpu/drm/exynos/regs-mixer.h   |    1 +
 2 files changed, 16 insertions(+)

diff --git a/drivers/gpu/drm/exynos/exynos_mixer.c b/drivers/gpu/drm/exynos/exynos_mixer.c
index c00abbe..d359501 100644
--- a/drivers/gpu/drm/exynos/exynos_mixer.c
+++ b/drivers/gpu/drm/exynos/exynos_mixer.c
@@ -377,6 +377,20 @@ static void mixer_run(struct mixer_context *ctx)
 	mixer_regs_dump(ctx);
 }
 
+static void mixer_stop(struct mixer_context *ctx)
+{
+	struct mixer_resources *res = &ctx->mixer_res;
+	int timeout = 20;
+
+	mixer_reg_writemask(res, MXR_STATUS, 0, MXR_STATUS_REG_RUN);
+
+	while (!(mixer_reg_read(res, MXR_STATUS) & MXR_STATUS_REG_IDLE) &&
+			--timeout)
+		usleep_range(10000, 12000);
+
+	mixer_regs_dump(ctx);
+}
+
 static void vp_video_buffer(struct mixer_context *ctx, int win)
 {
 	struct mixer_resources *res = &ctx->mixer_res;
@@ -1094,6 +1108,7 @@ static void mixer_poweroff(struct exynos_drm_manager *mgr)
 	}
 	mutex_unlock(&ctx->mixer_mutex);
 
+	mixer_stop(ctx);
 	mixer_window_suspend(mgr);
 
 	ctx->int_en = mixer_reg_read(res, MXR_INT_EN);
diff --git a/drivers/gpu/drm/exynos/regs-mixer.h b/drivers/gpu/drm/exynos/regs-mixer.h
index 4537026..5f32e1a 100644
--- a/drivers/gpu/drm/exynos/regs-mixer.h
+++ b/drivers/gpu/drm/exynos/regs-mixer.h
@@ -78,6 +78,7 @@
 #define MXR_STATUS_BIG_ENDIAN		(1 << 3)
 #define MXR_STATUS_ENDIAN_MASK		(1 << 3)
 #define MXR_STATUS_SYNC_ENABLE		(1 << 2)
+#define MXR_STATUS_REG_IDLE		(1 << 1)
 #define MXR_STATUS_REG_RUN		(1 << 0)
 
 /* bits for MXR_CFG */
-- 
1.7.9.5

  parent reply	other threads:[~2014-06-18 11:37 UTC|newest]

Thread overview: 7+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-06-18 11:34 [PATCH 0/5] drm/exynos: fix for misc issues related to exynos mixer Rahul Sharma
2014-06-18 11:34 ` [PATCH 1/5] drm/exynos: set power state variable after enabling clocks and power Rahul Sharma
2014-06-18 11:34 ` Rahul Sharma [this message]
2014-06-18 11:34 ` [PATCH 3/5] drm/exynos: allow mulitple layer updates per vsync for mixer Rahul Sharma
2014-06-18 11:34 ` [PATCH 4/5] drm/exynos: soft reset mixer before reconfigure after power-on Rahul Sharma
2014-06-18 11:34 ` [PATCH 5/5] drm/exynos: enable vsync interrupt while waiting for vblank Rahul Sharma
2014-06-20 14:51   ` Rahul Sharma

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