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From: "Michel Dänzer" <michel@daenzer.net>
To: dri-devel@lists.freedesktop.org
Subject: [PATCH 2/3] drm/radeon: Use write-combined CPU mappings of IBs on >= CIK
Date: Tue, 29 Jul 2014 18:47:21 +0900	[thread overview]
Message-ID: <1406627242-14901-2-git-send-email-michel@daenzer.net> (raw)
In-Reply-To: <1406627242-14901-1-git-send-email-michel@daenzer.net>

From: Michel Dänzer <michel.daenzer@amd.com>

Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
---
 drivers/gpu/drm/radeon/radeon_ring.c | 20 ++++++++++++++++----
 1 file changed, 16 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/radeon/radeon_ring.c b/drivers/gpu/drm/radeon/radeon_ring.c
index 7cfea7e..20b0e4f 100644
--- a/drivers/gpu/drm/radeon/radeon_ring.c
+++ b/drivers/gpu/drm/radeon/radeon_ring.c
@@ -201,10 +201,22 @@ int radeon_ib_pool_init(struct radeon_device *rdev)
 	if (rdev->ib_pool_ready) {
 		return 0;
 	}
-	r = radeon_sa_bo_manager_init(rdev, &rdev->ring_tmp_bo,
-				      RADEON_IB_POOL_SIZE*64*1024,
-				      RADEON_GPU_PAGE_SIZE,
-				      RADEON_GEM_DOMAIN_GTT, 0);
+
+	if (rdev->family >= CHIP_BONAIRE) {
+		r = radeon_sa_bo_manager_init(rdev, &rdev->ring_tmp_bo,
+					      RADEON_IB_POOL_SIZE*64*1024,
+					      RADEON_GPU_PAGE_SIZE,
+					      RADEON_GEM_DOMAIN_GTT,
+					      RADEON_GEM_GTT_WC);
+	} else {
+		/* Before CIK, it's better to stick to cacheable GTT due
+		 * to the command stream checking
+		 */
+		r = radeon_sa_bo_manager_init(rdev, &rdev->ring_tmp_bo,
+					      RADEON_IB_POOL_SIZE*64*1024,
+					      RADEON_GPU_PAGE_SIZE,
+					      RADEON_GEM_DOMAIN_GTT, 0);
+	}
 	if (r) {
 		return r;
 	}
-- 
2.0.1

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  reply	other threads:[~2014-07-29  9:47 UTC|newest]

Thread overview: 5+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-07-29  9:47 [PATCH 1/3] drm/radeon: Use write-combined CPU mappings of ring buffers with PCIe Michel Dänzer
2014-07-29  9:47 ` Michel Dänzer [this message]
2014-07-29  9:47 ` [PATCH 3/3] drm/radeon/cik: Read back SDMA WPTR register after writing it Michel Dänzer
2014-07-29  9:54 ` [PATCH 1/3] drm/radeon: Use write-combined CPU mappings of ring buffers with PCIe Christian König
2014-07-29 13:14   ` Alex Deucher

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