All of lore.kernel.org
 help / color / mirror / Atom feed
From: Chanwoo Choi <cw00.choi@samsung.com>
To: linux-samsung-soc@vger.kernel.org, linux-kernel@vger.kernel.org
Cc: kgene.kim@samsung.com, mark.rutland@arm.com,
	marc.zyngier@arm.com, arnd@arndb.de, olof@lixom.net,
	catalin.marinas@arm.com, will.deacon@arm.com,
	s.nawrocki@samsung.com, tomasz.figa@gmail.com,
	kyungmin.park@samsung.com, inki.dae@samsung.com,
	chanho61.park@samsung.com, geunsik.lim@samsung.com,
	sw0312.kim@samsung.com, jh80.chung@samsung.com,
	cw00.choi@samsung.com, a.kesavan@samsung.com,
	pankaj.dubey@samsung.com, devicetree@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org
Subject: [PATCH 16/19] arm64: dts: exynos: Add SPI/PDMA dt node for Exynos5433
Date: Tue, 02 Dec 2014 17:49:53 +0900	[thread overview]
Message-ID: <1417510196-6714-17-git-send-email-cw00.choi@samsung.com> (raw)
In-Reply-To: <1417510196-6714-1-git-send-email-cw00.choi@samsung.com>

This patch adds SPI (Serial Peripheral Interface) dt node for Exynos5433 SoC.
SPI transfers serial data by using various peripherals. SPI includes
8-bit/16-bit/32-bit shift registers to transmit and receive data. PDMA is used
for SPI communication.

Cc: Kukjin Kim <kgene.kim@samsung.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Marc Zyngier <marc.zyngier@arm.com>
Cc: Arnd Bergmann <arnd@arndb.de>
Cc: Olof Johansson <olof@lixom.net>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Will Deacon <will.deacon@arm.com>
Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
Acked-by: Inki Dae <inki.dae@samsung.com>
Acked-by: Geunsik Lim <geunsik.lim@samsung.com>
---
 arch/arm64/boot/dts/exynos/exynos5433.dtsi | 118 +++++++++++++++++++++++++++++
 1 file changed, 118 insertions(+)

diff --git a/arch/arm64/boot/dts/exynos/exynos5433.dtsi b/arch/arm64/boot/dts/exynos/exynos5433.dtsi
index fef9bbc..22f2df8 100644
--- a/arch/arm64/boot/dts/exynos/exynos5433.dtsi
+++ b/arch/arm64/boot/dts/exynos/exynos5433.dtsi
@@ -55,6 +55,11 @@
 		mshc0 = &mshc_0;
 		mshc1 = &mshc_1;
 		mshc2 = &mshc_2;
+		spi0 = &spi_0;
+		spi1 = &spi_1;
+		spi2 = &spi_2;
+		spi3 = &spi_3;
+		spi4 = &spi_4;
 	};
 
 	cpus {
@@ -249,6 +254,34 @@
 			interrupts = <1 9 0xf04>;
 		};
 
+		amba {
+			compatible = "arm,amba-bus";
+			#address-cells = <1>;
+			#size-cells = <1>;
+
+			pdma0: pdma@15610000 {
+				compatible = "arm,pl330", "arm,primecell";
+				reg = <0x15610000 0x1000>;
+				interrupts = <0 228 0>;
+				clocks = <&cmu_fsys CLK_PDMA0>;
+				clock-names = "apb_pclk";
+				#dma-cells = <1>;
+				#dma-channels = <8>;
+				#dma-requests = <32>;
+			};
+
+			pdma1: pdma@15600000 {
+				compatible = "arm,pl330", "arm,primecell";
+				reg = <0x15600000 0x1000>;
+				interrupts = <0 246 0>;
+				clocks = <&cmu_fsys CLK_PDMA1>;
+				clock-names = "apb_pclk";
+				#dma-cells = <1>;
+				#dma-channels = <8>;
+				#dma-requests = <32>;
+			};
+		};
+
 		serial_0: serial@14c10000 {
 			compatible = "samsung,exynos5433-uart";
 			reg = <0x14c10000 0x100>;
@@ -349,6 +382,91 @@
 			interrupts = <0 442 0>;
 		};
 
+		spi_0: spi@14d20000 {
+			compatible = "samsung,exynos7-spi";
+			reg = <0x14d20000 0x100>;
+			interrupts = <0 432 0>;
+			dmas = <&pdma0 9>, <&pdma0 8>;
+			dma-names = "tx", "rx";
+			#address-cells = <1>;
+			#size-cells = <0>;
+			clocks = <&cmu_peric CLK_PCLK_SPI0>,
+				 <&cmu_top CLK_SCLK_SPI0_PERIC>;
+			clock-names = "spi", "spi_busclk0";
+			samsung,spi-src-clk = <0>;
+			pinctrl-names = "default";
+			pinctrl-0 = <&spi0_bus>;
+			status = "disabled";
+		};
+
+		spi_1: spi@14d30000 {
+			compatible = "samsung,exynos7-spi";
+			reg = <0x14d30000 0x100>;
+			interrupts = <0 433 0>;
+			dmas = <&pdma0 11>, <&pdma0 10>;
+			dma-names = "tx", "rx";
+			#address-cells = <1>;
+			#size-cells = <0>;
+			clocks = <&cmu_peric CLK_PCLK_SPI1>,
+				 <&cmu_top CLK_SCLK_SPI1_PERIC>;
+			clock-names = "spi", "spi_busclk0";
+			samsung,spi-src-clk = <0>;
+			pinctrl-names = "default";
+			pinctrl-0 = <&spi1_bus>;
+			status = "disabled";
+		};
+
+		spi_2: spi@14d40000 {
+			compatible = "samsung,exynos7-spi";
+			reg = <0x14d40000 0x100>;
+			interrupts = <0 434 0>;
+			dmas = <&pdma0 13>, <&pdma0 12>;
+			dma-names = "tx", "rx";
+			#address-cells = <1>;
+			#size-cells = <0>;
+			clocks = <&cmu_peric CLK_PCLK_SPI2>,
+				 <&cmu_top CLK_SCLK_SPI2_PERIC>;
+			clock-names = "spi", "spi_busclk0";
+			samsung,spi-src-clk = <0>;
+			pinctrl-names = "default";
+			pinctrl-0 = <&spi2_bus>;
+			status = "disabled";
+		};
+
+		spi_3: spi@14d50000 {
+			compatible = "samsung,exynos7-spi";
+			reg = <0x14d50000 0x100>;
+			interrupts = <0 447 0>;
+			dmas = <&pdma0 23>, <&pdma0 22>;
+			dma-names = "tx", "rx";
+			#address-cells = <1>;
+			#size-cells = <0>;
+			clocks = <&cmu_peric CLK_PCLK_SPI3>,
+				 <&cmu_top CLK_SCLK_SPI3_PERIC>;
+			clock-names = "spi", "spi_busclk0";
+			samsung,spi-src-clk = <0>;
+			pinctrl-names = "default";
+			pinctrl-0 = <&spi3_bus>;
+			status = "disabled";
+		};
+
+		spi_4: spi@14d00000 {
+			compatible = "samsung,exynos7-spi";
+			reg = <0x14d00000 0x100>;
+			interrupts = <0 412 0>;
+			dmas = <&pdma0 25>, <&pdma0 24>;
+			dma-names = "tx", "rx";
+			#address-cells = <1>;
+			#size-cells = <0>;
+			clocks = <&cmu_peric CLK_PCLK_SPI4>,
+				 <&cmu_top CLK_SCLK_SPI4_PERIC>;
+			clock-names = "spi", "spi_busclk0";
+			samsung,spi-src-clk = <0>;
+			pinctrl-names = "default";
+			pinctrl-0 = <&spi4_bus>;
+			status = "disabled";
+		};
+
 		hsi2c_0: hsi2c@14e40000 {
 			compatible = "samsung,exynos7-hsi2c";
 			reg = <0x14e40000 0x1000>;
-- 
1.8.5.5


WARNING: multiple messages have this Message-ID (diff)
From: cw00.choi@samsung.com (Chanwoo Choi)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 16/19] arm64: dts: exynos: Add SPI/PDMA dt node for Exynos5433
Date: Tue, 02 Dec 2014 17:49:53 +0900	[thread overview]
Message-ID: <1417510196-6714-17-git-send-email-cw00.choi@samsung.com> (raw)
In-Reply-To: <1417510196-6714-1-git-send-email-cw00.choi@samsung.com>

This patch adds SPI (Serial Peripheral Interface) dt node for Exynos5433 SoC.
SPI transfers serial data by using various peripherals. SPI includes
8-bit/16-bit/32-bit shift registers to transmit and receive data. PDMA is used
for SPI communication.

Cc: Kukjin Kim <kgene.kim@samsung.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Marc Zyngier <marc.zyngier@arm.com>
Cc: Arnd Bergmann <arnd@arndb.de>
Cc: Olof Johansson <olof@lixom.net>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Will Deacon <will.deacon@arm.com>
Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
Acked-by: Inki Dae <inki.dae@samsung.com>
Acked-by: Geunsik Lim <geunsik.lim@samsung.com>
---
 arch/arm64/boot/dts/exynos/exynos5433.dtsi | 118 +++++++++++++++++++++++++++++
 1 file changed, 118 insertions(+)

diff --git a/arch/arm64/boot/dts/exynos/exynos5433.dtsi b/arch/arm64/boot/dts/exynos/exynos5433.dtsi
index fef9bbc..22f2df8 100644
--- a/arch/arm64/boot/dts/exynos/exynos5433.dtsi
+++ b/arch/arm64/boot/dts/exynos/exynos5433.dtsi
@@ -55,6 +55,11 @@
 		mshc0 = &mshc_0;
 		mshc1 = &mshc_1;
 		mshc2 = &mshc_2;
+		spi0 = &spi_0;
+		spi1 = &spi_1;
+		spi2 = &spi_2;
+		spi3 = &spi_3;
+		spi4 = &spi_4;
 	};
 
 	cpus {
@@ -249,6 +254,34 @@
 			interrupts = <1 9 0xf04>;
 		};
 
+		amba {
+			compatible = "arm,amba-bus";
+			#address-cells = <1>;
+			#size-cells = <1>;
+
+			pdma0: pdma at 15610000 {
+				compatible = "arm,pl330", "arm,primecell";
+				reg = <0x15610000 0x1000>;
+				interrupts = <0 228 0>;
+				clocks = <&cmu_fsys CLK_PDMA0>;
+				clock-names = "apb_pclk";
+				#dma-cells = <1>;
+				#dma-channels = <8>;
+				#dma-requests = <32>;
+			};
+
+			pdma1: pdma at 15600000 {
+				compatible = "arm,pl330", "arm,primecell";
+				reg = <0x15600000 0x1000>;
+				interrupts = <0 246 0>;
+				clocks = <&cmu_fsys CLK_PDMA1>;
+				clock-names = "apb_pclk";
+				#dma-cells = <1>;
+				#dma-channels = <8>;
+				#dma-requests = <32>;
+			};
+		};
+
 		serial_0: serial at 14c10000 {
 			compatible = "samsung,exynos5433-uart";
 			reg = <0x14c10000 0x100>;
@@ -349,6 +382,91 @@
 			interrupts = <0 442 0>;
 		};
 
+		spi_0: spi at 14d20000 {
+			compatible = "samsung,exynos7-spi";
+			reg = <0x14d20000 0x100>;
+			interrupts = <0 432 0>;
+			dmas = <&pdma0 9>, <&pdma0 8>;
+			dma-names = "tx", "rx";
+			#address-cells = <1>;
+			#size-cells = <0>;
+			clocks = <&cmu_peric CLK_PCLK_SPI0>,
+				 <&cmu_top CLK_SCLK_SPI0_PERIC>;
+			clock-names = "spi", "spi_busclk0";
+			samsung,spi-src-clk = <0>;
+			pinctrl-names = "default";
+			pinctrl-0 = <&spi0_bus>;
+			status = "disabled";
+		};
+
+		spi_1: spi at 14d30000 {
+			compatible = "samsung,exynos7-spi";
+			reg = <0x14d30000 0x100>;
+			interrupts = <0 433 0>;
+			dmas = <&pdma0 11>, <&pdma0 10>;
+			dma-names = "tx", "rx";
+			#address-cells = <1>;
+			#size-cells = <0>;
+			clocks = <&cmu_peric CLK_PCLK_SPI1>,
+				 <&cmu_top CLK_SCLK_SPI1_PERIC>;
+			clock-names = "spi", "spi_busclk0";
+			samsung,spi-src-clk = <0>;
+			pinctrl-names = "default";
+			pinctrl-0 = <&spi1_bus>;
+			status = "disabled";
+		};
+
+		spi_2: spi at 14d40000 {
+			compatible = "samsung,exynos7-spi";
+			reg = <0x14d40000 0x100>;
+			interrupts = <0 434 0>;
+			dmas = <&pdma0 13>, <&pdma0 12>;
+			dma-names = "tx", "rx";
+			#address-cells = <1>;
+			#size-cells = <0>;
+			clocks = <&cmu_peric CLK_PCLK_SPI2>,
+				 <&cmu_top CLK_SCLK_SPI2_PERIC>;
+			clock-names = "spi", "spi_busclk0";
+			samsung,spi-src-clk = <0>;
+			pinctrl-names = "default";
+			pinctrl-0 = <&spi2_bus>;
+			status = "disabled";
+		};
+
+		spi_3: spi at 14d50000 {
+			compatible = "samsung,exynos7-spi";
+			reg = <0x14d50000 0x100>;
+			interrupts = <0 447 0>;
+			dmas = <&pdma0 23>, <&pdma0 22>;
+			dma-names = "tx", "rx";
+			#address-cells = <1>;
+			#size-cells = <0>;
+			clocks = <&cmu_peric CLK_PCLK_SPI3>,
+				 <&cmu_top CLK_SCLK_SPI3_PERIC>;
+			clock-names = "spi", "spi_busclk0";
+			samsung,spi-src-clk = <0>;
+			pinctrl-names = "default";
+			pinctrl-0 = <&spi3_bus>;
+			status = "disabled";
+		};
+
+		spi_4: spi at 14d00000 {
+			compatible = "samsung,exynos7-spi";
+			reg = <0x14d00000 0x100>;
+			interrupts = <0 412 0>;
+			dmas = <&pdma0 25>, <&pdma0 24>;
+			dma-names = "tx", "rx";
+			#address-cells = <1>;
+			#size-cells = <0>;
+			clocks = <&cmu_peric CLK_PCLK_SPI4>,
+				 <&cmu_top CLK_SCLK_SPI4_PERIC>;
+			clock-names = "spi", "spi_busclk0";
+			samsung,spi-src-clk = <0>;
+			pinctrl-names = "default";
+			pinctrl-0 = <&spi4_bus>;
+			status = "disabled";
+		};
+
 		hsi2c_0: hsi2c at 14e40000 {
 			compatible = "samsung,exynos7-hsi2c";
 			reg = <0x14e40000 0x1000>;
-- 
1.8.5.5

  parent reply	other threads:[~2014-12-02  8:53 UTC|newest]

Thread overview: 107+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-12-02  8:49 [PATCHv2 00/19] arm64: Add the support for new 64-bit Exynos5433 SoC Chanwoo Choi
2014-12-02  8:49 ` Chanwoo Choi
2014-12-02  8:49 ` [PATCH 01/19] clk: samsung: exynos5433: Add clocks using common clock framework Chanwoo Choi
2014-12-02  8:49   ` Chanwoo Choi
     [not found]   ` <1417510196-6714-2-git-send-email-cw00.choi-Sze3O3UU22JBDgjK7y7TUQ@public.gmane.org>
2014-12-08 11:30     ` Pankaj Dubey
2014-12-08 11:30       ` Pankaj Dubey
     [not found]       ` <54858BBD.5060002-Sze3O3UU22JBDgjK7y7TUQ@public.gmane.org>
2014-12-09  1:04         ` Chanwoo Choi
2014-12-09  1:04           ` Chanwoo Choi
2014-12-02  8:49 ` [PATCH 02/19] clk: samsung: exynos5433: Add MUX clocks of CMU_TOP domain Chanwoo Choi
2014-12-02  8:49   ` Chanwoo Choi
2014-12-02  8:49   ` Chanwoo Choi
2014-12-08 11:31   ` Pankaj Dubey
2014-12-08 11:31     ` Pankaj Dubey
2014-12-08 11:31     ` Pankaj Dubey
2014-12-09  1:05     ` Chanwoo Choi
2014-12-09  1:05       ` Chanwoo Choi
2014-12-09  1:05       ` Chanwoo Choi
2014-12-02  8:49 ` [PATCH 03/19] clk: samsung: exynos5433: Add clocks for CMU_PERIC domain Chanwoo Choi
2014-12-02  8:49   ` Chanwoo Choi
2014-12-02  8:49   ` Chanwoo Choi
2014-12-08 11:31   ` Pankaj Dubey
2014-12-08 11:31     ` Pankaj Dubey
2014-12-09  1:12     ` Chanwoo Choi
2014-12-09  1:12       ` Chanwoo Choi
2014-12-09  1:12       ` Chanwoo Choi
2014-12-09  6:13       ` Pankaj Dubey
2014-12-09  6:13         ` Pankaj Dubey
2014-12-09  6:30         ` Chanwoo Choi
2014-12-09  6:30           ` Chanwoo Choi
2014-12-09  6:30           ` Chanwoo Choi
2014-12-02  8:49 ` [PATCH 04/19] clk: samsung: exynos5433: Add clocks for CMU_PERIS domain Chanwoo Choi
2014-12-02  8:49   ` Chanwoo Choi
2014-12-02  8:49   ` Chanwoo Choi
2014-12-08 11:32   ` Pankaj Dubey
2014-12-08 11:32     ` Pankaj Dubey
2014-12-08 11:32     ` Pankaj Dubey
2014-12-09  1:14     ` Chanwoo Choi
2014-12-09  1:14       ` Chanwoo Choi
2014-12-02  8:49 ` [PATCH 05/19] clk: samsung: exynos5433: Add clocks for CMU_G2D domain Chanwoo Choi
2014-12-02  8:49   ` Chanwoo Choi
2014-12-02  8:49   ` Chanwoo Choi
2014-12-08 11:36   ` Pankaj Dubey
2014-12-08 11:36     ` Pankaj Dubey
2014-12-09  1:16     ` Chanwoo Choi
2014-12-09  1:16       ` Chanwoo Choi
2014-12-09  1:16       ` Chanwoo Choi
2014-12-02  8:49 ` [PATCH 06/19] clk: samsung: exynos5433: Add clocks for CMU_MIF domain Chanwoo Choi
2014-12-02  8:49   ` Chanwoo Choi
2014-12-08 11:37   ` Pankaj Dubey
2014-12-08 11:37     ` Pankaj Dubey
2014-12-08 11:37     ` Pankaj Dubey
2014-12-09  1:31     ` Chanwoo Choi
2014-12-09  1:31       ` Chanwoo Choi
2014-12-02  8:49 ` [PATCH 07/19] clk: samsung: exynos5433: Add clocks for CMU_DISP domain Chanwoo Choi
2014-12-02  8:49   ` Chanwoo Choi
2014-12-09  6:06   ` Pankaj Dubey
2014-12-09  6:06     ` Pankaj Dubey
2014-12-02  8:49 ` [PATCH 08/19] clk: samsung: exynos5433: Add clocks for CMU_AUD domain Chanwoo Choi
2014-12-02  8:49   ` Chanwoo Choi
2014-12-09  6:05   ` Pankaj Dubey
2014-12-09  6:05     ` Pankaj Dubey
2014-12-09  6:05     ` Pankaj Dubey
2014-12-02  8:49 ` [PATCH 09/19] clk: samsung: exynos5433: Add clocks for CMU_BUS{0|1|2} domains Chanwoo Choi
2014-12-02  8:49   ` Chanwoo Choi
2014-12-09  6:05   ` Pankaj Dubey
2014-12-09  6:05     ` Pankaj Dubey
2014-12-02  8:49 ` [PATCH 10/19] clk: samsung: exynos5433: Add missing clocks for CMU_FSYS domain Chanwoo Choi
2014-12-02  8:49   ` Chanwoo Choi
2014-12-02  8:49   ` Chanwoo Choi
2014-12-09  6:03   ` Pankaj Dubey
2014-12-09  6:03     ` Pankaj Dubey
2014-12-02  8:49 ` [PATCH 11/19] clk: samsung: exynos5433: Add clocks for CMU_G3D domain Chanwoo Choi
2014-12-02  8:49   ` Chanwoo Choi
2014-12-02  8:49   ` Chanwoo Choi
2014-12-09  6:28   ` Pankaj Dubey
2014-12-09  6:28     ` Pankaj Dubey
2014-12-02  8:49 ` [PATCH 12/19] clk: samsung: exynos5433: Add clocks for CMU_GSCL domain Chanwoo Choi
2014-12-02  8:49   ` Chanwoo Choi
2014-12-09  7:48   ` Pankaj Dubey
2014-12-09  7:48     ` Pankaj Dubey
2014-12-02  8:49 ` [PATCH 13/19] arm64: exynos5433: Enable ARMv8-based Exynos5433 SoC support Chanwoo Choi
2014-12-02  8:49   ` Chanwoo Choi
2014-12-02  8:49 ` [PATCH 14/19] arm64: dts: exynos: Add dts files for 64-bit Exynos5433 SoC Chanwoo Choi
2014-12-02  8:49   ` Chanwoo Choi
2014-12-02 11:09   ` Mark Rutland
2014-12-02 11:09     ` Mark Rutland
2014-12-02 11:09     ` Mark Rutland
2014-12-02 11:52     ` Chanwoo Choi
2014-12-02 11:52       ` Chanwoo Choi
2014-12-02 11:52       ` Chanwoo Choi
2014-12-02 12:13       ` Mark Rutland
2014-12-02 12:13         ` Mark Rutland
2014-12-02 12:13         ` Mark Rutland
2014-12-02 15:47         ` Chanwoo Choi
2014-12-02 15:47           ` Chanwoo Choi
2014-12-02 15:47           ` Chanwoo Choi
2014-12-02  8:49 ` [PATCH 15/19] arm64: dts: exynos: Add MSHC dt node for Exynos5433 Chanwoo Choi
2014-12-02  8:49   ` Chanwoo Choi
2014-12-02  8:49 ` Chanwoo Choi [this message]
2014-12-02  8:49   ` [PATCH 16/19] arm64: dts: exynos: Add SPI/PDMA " Chanwoo Choi
2014-12-02  8:49 ` [PATCH 17/19] serial: samsung: Add the support for Exynos5433 SoC Chanwoo Choi
2014-12-02  8:49   ` Chanwoo Choi
2014-12-02  8:49   ` Chanwoo Choi
2014-12-02  8:49 ` [PATCH 18/19] clocksource: exynos_mct: Add the support for Exynos 64bit SoC Chanwoo Choi
2014-12-02  8:49   ` Chanwoo Choi
2014-12-02  8:49 ` [PATCH 19/19] arm64: Enable Exynos5433 SoC in the defconfig Chanwoo Choi
2014-12-02  8:49   ` Chanwoo Choi

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=1417510196-6714-17-git-send-email-cw00.choi@samsung.com \
    --to=cw00.choi@samsung.com \
    --cc=a.kesavan@samsung.com \
    --cc=arnd@arndb.de \
    --cc=catalin.marinas@arm.com \
    --cc=chanho61.park@samsung.com \
    --cc=devicetree@vger.kernel.org \
    --cc=geunsik.lim@samsung.com \
    --cc=inki.dae@samsung.com \
    --cc=jh80.chung@samsung.com \
    --cc=kgene.kim@samsung.com \
    --cc=kyungmin.park@samsung.com \
    --cc=linux-arm-kernel@lists.infradead.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=linux-samsung-soc@vger.kernel.org \
    --cc=marc.zyngier@arm.com \
    --cc=mark.rutland@arm.com \
    --cc=olof@lixom.net \
    --cc=pankaj.dubey@samsung.com \
    --cc=s.nawrocki@samsung.com \
    --cc=sw0312.kim@samsung.com \
    --cc=tomasz.figa@gmail.com \
    --cc=will.deacon@arm.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.