From: Archit Taneja <architt@codeaurora.org> To: linux-mtd@lists.infradead.org, linux-arm-msm@vger.kernel.org Cc: linux-kernel@vger.kernel.org, agross@codeaurora.org, galak@codeaurora.org, Archit Taneja <architt@codeaurora.org>, Stephen Boyd <sboyd@codeaurora.org> Subject: [PATCH 1/5] clk: qcom: Add EBI2 clocks for IPQ806x Date: Fri, 16 Jan 2015 20:18:18 +0530 [thread overview] Message-ID: <1421419702-17812-2-git-send-email-architt@codeaurora.org> (raw) In-Reply-To: <1421419702-17812-1-git-send-email-architt@codeaurora.org> The NAND controller within EBI2 requires EBI2_CLK and EBI2_ALWAYS_ON_CLK clocks. Create structs for these clocks so that they can be used by the NAND controller driver. Add an entry for EBI2_AON_CLK in the gcc-ipq806x DT binding document. Cc: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Archit Taneja <architt@codeaurora.org> --- drivers/clk/qcom/gcc-ipq806x.c | 34 ++++++++++++++++++++++++++++ include/dt-bindings/clock/qcom,gcc-ipq806x.h | 1 + 2 files changed, 35 insertions(+) diff --git a/drivers/clk/qcom/gcc-ipq806x.c b/drivers/clk/qcom/gcc-ipq806x.c index afed5eb..7db54c8 100644 --- a/drivers/clk/qcom/gcc-ipq806x.c +++ b/drivers/clk/qcom/gcc-ipq806x.c @@ -2159,6 +2159,38 @@ static struct clk_branch usb_fs1_h_clk = { }, }; +static struct clk_branch ebi2_clk = { + .hwcg_reg = 0x3b00, + .hwcg_bit = 6, + .halt_reg = 0x2fcc, + .halt_bit = 1, + .clkr = { + .enable_reg = 0x3b00, + .enable_mask = BIT(4), + .hw.init = &(struct clk_init_data){ + .name = "ebi2_clk", + .ops = &clk_branch_ops, + .flags = CLK_IS_ROOT, + }, + }, +}; + +static struct clk_branch ebi2_aon_clk = { + .hwcg_reg = 0x3b00, + .hwcg_bit = 6, + .halt_reg = 0x2fcc, + .halt_bit = 0, + .clkr = { + .enable_reg = 0x3b00, + .enable_mask = BIT(8), + .hw.init = &(struct clk_init_data){ + .name = "ebi2_always_on_clk", + .ops = &clk_branch_ops, + .flags = CLK_IS_ROOT, + }, + }, +}; + static struct clk_regmap *gcc_ipq806x_clks[] = { [PLL0] = &pll0.clkr, [PLL0_VOTE] = &pll0_vote, @@ -2261,6 +2293,8 @@ static struct clk_regmap *gcc_ipq806x_clks[] = { [USB_FS1_XCVR_SRC] = &usb_fs1_xcvr_clk_src.clkr, [USB_FS1_XCVR_CLK] = &usb_fs1_xcvr_clk.clkr, [USB_FS1_SYSTEM_CLK] = &usb_fs1_sys_clk.clkr, + [EBI2_CLK] = &ebi2_clk.clkr, + [EBI2_AON_CLK] = &ebi2_aon_clk.clkr, }; static const struct qcom_reset_map gcc_ipq806x_resets[] = { diff --git a/include/dt-bindings/clock/qcom,gcc-ipq806x.h b/include/dt-bindings/clock/qcom,gcc-ipq806x.h index b857cad..858a47f 100644 --- a/include/dt-bindings/clock/qcom,gcc-ipq806x.h +++ b/include/dt-bindings/clock/qcom,gcc-ipq806x.h @@ -289,5 +289,6 @@ #define UBI32_CORE2_CLK_SRC 278 #define UBI32_CORE1_CLK 279 #define UBI32_CORE2_CLK 280 +#define EBI2_AON_CLK 281 #endif -- The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum, hosted by The Linux Foundation
WARNING: multiple messages have this Message-ID (diff)
From: Archit Taneja <architt@codeaurora.org> To: linux-mtd@lists.infradead.org, linux-arm-msm@vger.kernel.org Cc: Archit Taneja <architt@codeaurora.org>, galak@codeaurora.org, Stephen Boyd <sboyd@codeaurora.org>, linux-kernel@vger.kernel.org, agross@codeaurora.org Subject: [PATCH 1/5] clk: qcom: Add EBI2 clocks for IPQ806x Date: Fri, 16 Jan 2015 20:18:18 +0530 [thread overview] Message-ID: <1421419702-17812-2-git-send-email-architt@codeaurora.org> (raw) In-Reply-To: <1421419702-17812-1-git-send-email-architt@codeaurora.org> The NAND controller within EBI2 requires EBI2_CLK and EBI2_ALWAYS_ON_CLK clocks. Create structs for these clocks so that they can be used by the NAND controller driver. Add an entry for EBI2_AON_CLK in the gcc-ipq806x DT binding document. Cc: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Archit Taneja <architt@codeaurora.org> --- drivers/clk/qcom/gcc-ipq806x.c | 34 ++++++++++++++++++++++++++++ include/dt-bindings/clock/qcom,gcc-ipq806x.h | 1 + 2 files changed, 35 insertions(+) diff --git a/drivers/clk/qcom/gcc-ipq806x.c b/drivers/clk/qcom/gcc-ipq806x.c index afed5eb..7db54c8 100644 --- a/drivers/clk/qcom/gcc-ipq806x.c +++ b/drivers/clk/qcom/gcc-ipq806x.c @@ -2159,6 +2159,38 @@ static struct clk_branch usb_fs1_h_clk = { }, }; +static struct clk_branch ebi2_clk = { + .hwcg_reg = 0x3b00, + .hwcg_bit = 6, + .halt_reg = 0x2fcc, + .halt_bit = 1, + .clkr = { + .enable_reg = 0x3b00, + .enable_mask = BIT(4), + .hw.init = &(struct clk_init_data){ + .name = "ebi2_clk", + .ops = &clk_branch_ops, + .flags = CLK_IS_ROOT, + }, + }, +}; + +static struct clk_branch ebi2_aon_clk = { + .hwcg_reg = 0x3b00, + .hwcg_bit = 6, + .halt_reg = 0x2fcc, + .halt_bit = 0, + .clkr = { + .enable_reg = 0x3b00, + .enable_mask = BIT(8), + .hw.init = &(struct clk_init_data){ + .name = "ebi2_always_on_clk", + .ops = &clk_branch_ops, + .flags = CLK_IS_ROOT, + }, + }, +}; + static struct clk_regmap *gcc_ipq806x_clks[] = { [PLL0] = &pll0.clkr, [PLL0_VOTE] = &pll0_vote, @@ -2261,6 +2293,8 @@ static struct clk_regmap *gcc_ipq806x_clks[] = { [USB_FS1_XCVR_SRC] = &usb_fs1_xcvr_clk_src.clkr, [USB_FS1_XCVR_CLK] = &usb_fs1_xcvr_clk.clkr, [USB_FS1_SYSTEM_CLK] = &usb_fs1_sys_clk.clkr, + [EBI2_CLK] = &ebi2_clk.clkr, + [EBI2_AON_CLK] = &ebi2_aon_clk.clkr, }; static const struct qcom_reset_map gcc_ipq806x_resets[] = { diff --git a/include/dt-bindings/clock/qcom,gcc-ipq806x.h b/include/dt-bindings/clock/qcom,gcc-ipq806x.h index b857cad..858a47f 100644 --- a/include/dt-bindings/clock/qcom,gcc-ipq806x.h +++ b/include/dt-bindings/clock/qcom,gcc-ipq806x.h @@ -289,5 +289,6 @@ #define UBI32_CORE2_CLK_SRC 278 #define UBI32_CORE1_CLK 279 #define UBI32_CORE2_CLK 280 +#define EBI2_AON_CLK 281 #endif -- The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum, hosted by The Linux Foundation
next prev parent reply other threads:[~2015-01-16 14:48 UTC|newest] Thread overview: 145+ messages / expand[flat|nested] mbox.gz Atom feed top 2015-01-16 14:48 [PATCH 0/5] mtd: Qualcomm NAND controller driver Archit Taneja 2015-01-16 14:48 ` Archit Taneja 2015-01-16 14:48 ` Archit Taneja [this message] 2015-01-16 14:48 ` [PATCH 1/5] clk: qcom: Add EBI2 clocks for IPQ806x Archit Taneja 2015-01-16 21:56 ` Stephen Boyd 2015-01-16 21:56 ` Stephen Boyd 2015-01-19 10:32 ` Archit Taneja 2015-01-19 10:32 ` Archit Taneja 2015-01-29 22:21 ` Stephen Boyd 2015-01-29 22:21 ` Stephen Boyd 2015-01-16 14:48 ` [PATCH 2/5] mtd: nand: Add qcom nand controller driver Archit Taneja 2015-01-16 14:48 ` Archit Taneja 2015-01-21 0:54 ` Daniel Ehrenberg 2015-01-21 0:54 ` Daniel Ehrenberg 2015-01-22 6:36 ` Archit Taneja 2015-01-22 6:36 ` Archit Taneja 2015-01-26 21:05 ` Kevin Cernekee 2015-01-26 21:05 ` Kevin Cernekee 2015-01-27 3:56 ` Archit Taneja [not found] ` <1421419702-17812-1-git-send-email-architt-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org> 2015-01-16 14:48 ` [PATCH 3/5] Documentaion: dt: add DT bindings for Qualcomm NAND controller Archit Taneja 2015-01-16 14:48 ` Archit Taneja 2015-01-16 14:48 ` Archit Taneja 2015-01-16 14:48 ` [PATCH 4/5] arm: qcom: dts: Add NAND controller node for ipq806x Archit Taneja 2015-01-16 14:48 ` Archit Taneja 2015-01-16 14:48 ` [PATCH 5/5] arm: qcom: dts: Enale NAND node on IPQ8064 AP148 pplatform Archit Taneja 2015-01-16 14:48 ` Archit Taneja 2015-02-18 6:03 ` [PATCH 0/5] mtd: Qualcomm NAND controller driver Archit Taneja 2015-02-18 6:03 ` Archit Taneja 2015-07-21 10:34 ` [PATCH v2 " Archit Taneja 2015-07-21 10:34 ` [PATCH v2 1/5] mtd: nand: Create a BBT flag to access bad block markers in raw mode Archit Taneja 2015-07-21 10:34 ` Archit Taneja 2015-07-24 19:01 ` Andy Gross 2015-07-21 10:34 ` [PATCH v2 2/5] mtd: nand: Qualcomm NAND controller driver Archit Taneja 2015-07-24 19:39 ` Andy Gross 2015-07-25 0:51 ` Stephen Boyd 2015-07-28 4:34 ` Archit Taneja 2015-07-29 1:48 ` Stephen Boyd 2015-07-29 5:14 ` Archit Taneja 2015-07-29 18:33 ` Stephen Boyd 2015-07-30 6:53 ` Archit Taneja 2015-07-21 10:34 ` [PATCH v2 3/5] dt/bindings: qcom_nandc: Add DT bindings Archit Taneja 2015-07-24 18:57 ` Andy Gross 2015-07-24 19:37 ` Stephen Boyd 2015-07-21 10:34 ` [PATCH v2 4/5] arm: qcom: dts: Add NAND controller node for ipq806x Archit Taneja 2015-07-24 19:01 ` Andy Gross 2015-07-21 10:34 ` [PATCH v2 5/5] arm: qcom: dts: Enale NAND node on IPQ8064 AP148 platform Archit Taneja 2015-07-24 18:58 ` Andy Gross 2015-07-24 18:59 ` Andy Gross 2015-08-03 5:08 ` [PATCH v3 0/5] mtd: Qualcomm NAND controller driver Archit Taneja 2015-08-03 5:08 ` [PATCH v3 1/5] mtd: nand: Create a BBT flag to access bad block markers in raw mode Archit Taneja 2015-08-03 5:08 ` [PATCH v3 2/5] mtd: nand: Qualcomm NAND controller driver Archit Taneja 2015-08-03 23:38 ` Stephen Boyd 2015-08-04 15:04 ` Archit Taneja 2015-08-04 17:53 ` Stephen Boyd 2015-08-03 5:08 ` [PATCH v3 3/5] dt/bindings: qcom_nandc: Add DT bindings Archit Taneja 2015-08-03 5:08 ` [PATCH v3 4/5] arm: qcom: dts: Add NAND controller node for ipq806x Archit Taneja [not found] ` <1438578498-32254-1-git-send-email-architt-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org> 2015-08-03 5:08 ` [PATCH v3 5/5] arm: qcom: dts: Enable NAND node on IPQ8064 AP148 platform Archit Taneja 2015-08-03 5:08 ` Archit Taneja 2015-08-03 19:35 ` Andy Gross 2015-08-04 15:05 ` Archit Taneja 2015-08-03 20:58 ` Stephen Boyd 2015-08-04 15:06 ` Archit Taneja 2015-08-19 4:49 ` [PATCH v4 0/5] mtd: Qualcomm NAND controller driver Archit Taneja 2015-08-19 4:49 ` [PATCH v4 1/5] mtd: nand: Create a BBT flag to access bad block markers in raw mode Archit Taneja 2015-10-02 2:44 ` Brian Norris 2015-10-02 6:27 ` Boris Brezillon 2015-10-02 6:27 ` Boris Brezillon 2015-10-11 20:03 ` Brian Norris 2015-11-10 5:13 ` Archit Taneja 2015-08-19 4:49 ` [PATCH v4 2/5] mtd: nand: Qualcomm NAND controller driver Archit Taneja 2015-08-26 23:37 ` Stephen Boyd 2015-09-13 13:42 ` Archit Taneja 2015-10-02 3:05 ` Brian Norris 2015-10-05 6:51 ` Archit Taneja 2015-10-06 9:17 ` Brian Norris 2015-10-07 4:11 ` Archit Taneja 2015-10-02 17:31 ` Brian Norris 2015-12-16 9:15 ` Boris Brezillon 2015-12-16 11:57 ` Archit Taneja 2015-12-16 14:18 ` Boris Brezillon 2015-12-16 14:18 ` Boris Brezillon 2015-12-17 9:48 ` Archit Taneja 2015-12-18 18:48 ` Boris Brezillon 2015-12-16 19:16 ` Brian Norris 2015-08-19 4:49 ` [PATCH v4 3/5] dt/bindings: qcom_nandc: Add DT bindings Archit Taneja 2015-12-16 6:33 ` Boris Brezillon 2015-12-16 8:11 ` Archit Taneja 2015-08-19 4:49 ` [PATCH v4 4/5] arm: qcom: dts: Add NAND controller node for ipq806x Archit Taneja 2015-08-19 4:49 ` [PATCH v4 5/5] arm: qcom: dts: Enable NAND node on IPQ8064 AP148 platform Archit Taneja 2016-01-05 5:24 ` [PATCH v5 0/3] mtd: Qualcomm NAND controller driver Archit Taneja 2016-01-05 5:24 ` [PATCH v5 1/3] mtd: nand: don't select chip in nand_chip's block_bad op Archit Taneja 2016-01-06 16:05 ` Boris Brezillon 2016-01-07 4:27 ` Archit Taneja 2016-01-05 5:25 ` [PATCH v5 2/3] mtd: nand: Qualcomm NAND controller driver Archit Taneja 2016-01-06 17:05 ` Boris Brezillon 2016-01-08 6:33 ` Archit Taneja 2016-01-08 8:01 ` Boris Brezillon 2016-01-08 10:23 ` Archit Taneja 2016-01-08 10:31 ` Boris Brezillon 2016-01-08 10:42 ` Archit Taneja 2016-01-05 5:25 ` [PATCH v5 3/3] dt/bindings: qcom_nandc: Add DT bindings Archit Taneja 2016-01-06 15:05 ` Boris Brezillon 2016-01-06 15:14 ` Rob Herring 2016-01-06 15:37 ` Boris Brezillon 2016-01-06 16:13 ` Rob Herring 2016-01-06 16:36 ` Boris Brezillon 2016-01-18 9:50 ` [PATCH v6 0/3] mtd: Qualcomm NAND controller driver Archit Taneja 2016-01-18 9:50 ` [PATCH v6 1/3] mtd: nand: don't select chip in nand_chip's block_bad op Archit Taneja 2016-01-18 10:29 ` Boris Brezillon 2016-01-18 10:47 ` Archit Taneja 2016-01-18 9:50 ` [PATCH v6 2/3] mtd: nand: Qualcomm NAND controller driver Archit Taneja 2016-01-18 11:01 ` Boris Brezillon 2016-01-18 11:14 ` Archit Taneja 2016-01-18 9:50 ` [PATCH v6 3/3] dt/bindings: qcom_nandc: Add DT bindings Archit Taneja 2016-01-20 14:46 ` Rob Herring 2016-01-21 7:13 ` [PATCH v7 0/3] mtd: Qualcomm NAND controller driver Archit Taneja 2016-01-21 7:13 ` [PATCH v7 1/3] mtd: nand: don't select chip in nand_chip's block_bad op Archit Taneja 2016-01-21 8:33 ` Boris Brezillon 2016-01-21 7:13 ` [PATCH v7 2/3] mtd: nand: Qualcomm NAND controller driver Archit Taneja 2016-01-21 8:51 ` Boris Brezillon 2016-01-21 9:52 ` Archit Taneja 2016-01-21 10:13 ` Boris Brezillon 2016-01-21 11:00 ` Archit Taneja 2016-01-21 12:36 ` Boris Brezillon 2016-01-21 13:08 ` Archit Taneja 2016-01-21 13:25 ` Boris Brezillon 2016-01-25 7:43 ` Archit Taneja 2016-01-21 7:13 ` [PATCH v7 3/3] dt/bindings: qcom_nandc: Add DT bindings Archit Taneja 2016-01-21 7:23 ` Archit Taneja 2016-02-03 8:59 ` [PATCH v8 0/3] mtd: Qualcomm NAND controller driver Archit Taneja 2016-02-03 8:59 ` [PATCH v8 1/3] mtd: nand: don't select chip in nand_chip's block_bad op Archit Taneja 2016-02-03 8:59 ` [PATCH v8 2/3] mtd: nand: Qualcomm NAND controller driver Archit Taneja 2016-02-04 10:39 ` Boris Brezillon 2016-02-04 16:13 ` Archit Taneja 2016-02-16 6:50 ` Archit Taneja 2016-03-08 10:13 ` Archit Taneja 2016-03-18 15:49 ` Boris Brezillon 2016-03-18 16:48 ` Boris Brezillon 2016-03-19 10:14 ` Archit Taneja 2016-03-19 10:34 ` Boris Brezillon 2016-03-22 13:10 ` Archit Taneja 2016-03-22 14:05 ` Boris Brezillon 2016-02-03 8:59 ` [PATCH v8 3/3] dt/bindings: qcom_nandc: Add DT bindings Archit Taneja 2016-03-10 19:47 ` [PATCH v8 0/3] mtd: Qualcomm NAND controller driver Brian Norris 2016-03-16 5:43 ` Archit Taneja
Reply instructions: You may reply publicly to this message via plain-text email using any one of the following methods: * Save the following mbox file, import it into your mail client, and reply-to-all from there: mbox Avoid top-posting and favor interleaved quoting: https://en.wikipedia.org/wiki/Posting_style#Interleaved_style * Reply using the --to, --cc, and --in-reply-to switches of git-send-email(1): git send-email \ --in-reply-to=1421419702-17812-2-git-send-email-architt@codeaurora.org \ --to=architt@codeaurora.org \ --cc=agross@codeaurora.org \ --cc=galak@codeaurora.org \ --cc=linux-arm-msm@vger.kernel.org \ --cc=linux-kernel@vger.kernel.org \ --cc=linux-mtd@lists.infradead.org \ --cc=sboyd@codeaurora.org \ /path/to/YOUR_REPLY https://kernel.org/pub/software/scm/git/docs/git-send-email.html * If your mail client supports setting the In-Reply-To header via mailto: links, try the mailto: linkBe sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes, see mirroring instructions on how to clone and mirror all data and code used by this external index.