From: Tomi Valkeinen <tomi.valkeinen@ti.com> To: linux-omap@vger.kernel.org, linux-fbdev@vger.kernel.org Cc: Tomi Valkeinen <tomi.valkeinen@ti.com> Subject: [PATCH 08/15] OMAPDSS: DISPC: change sync_pclk_edge default value Date: Thu, 26 Feb 2015 12:49:02 +0000 [thread overview] Message-ID: <1424954949-12801-8-git-send-email-tomi.valkeinen@ti.com> (raw) In-Reply-To: <1424954949-12801-1-git-send-email-tomi.valkeinen@ti.com> The common 'struct videomode' does not have a flag to select when the sync signals should be driven. The default behavior of DISPC HW is to drive the sync signal on the opposite pixel clock edge from data signal, which is also what the videomode_to_omap_video_timings() uses. However, it looks like what panels usually expect is that the data and sync signals are driven on the same edge, so let's change videomode_to_omap_video_timings() to set the sync_pclk_edge accordingly. Note that this only affect panels drivers that use videomode_to_omap_video_timings(), probably when getting the video timings directly from DT data. The drivers can still configure the sync_pclk_edge independently if they so wish. Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com> --- drivers/video/fbdev/omap2/dss/display.c | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) diff --git a/drivers/video/fbdev/omap2/dss/display.c b/drivers/video/fbdev/omap2/dss/display.c index a6fd2d35ad60..ef5b9027985d 100644 --- a/drivers/video/fbdev/omap2/dss/display.c +++ b/drivers/video/fbdev/omap2/dss/display.c @@ -295,9 +295,7 @@ void videomode_to_omap_video_timings(const struct videomode *vm, OMAPDSS_DRIVE_SIG_RISING_EDGE : OMAPDSS_DRIVE_SIG_FALLING_EDGE; - ovt->sync_pclk_edge = vm->flags & DISPLAY_FLAGS_PIXDATA_POSEDGE ? - OMAPDSS_DRIVE_SIG_FALLING_EDGE : - OMAPDSS_DRIVE_SIG_RISING_EDGE; + ovt->sync_pclk_edge = ovt->data_pclk_edge; } EXPORT_SYMBOL(videomode_to_omap_video_timings); -- 2.3.0
WARNING: multiple messages have this Message-ID (diff)
From: Tomi Valkeinen <tomi.valkeinen@ti.com> To: linux-omap@vger.kernel.org, linux-fbdev@vger.kernel.org Cc: Tomi Valkeinen <tomi.valkeinen@ti.com> Subject: [PATCH 08/15] OMAPDSS: DISPC: change sync_pclk_edge default value Date: Thu, 26 Feb 2015 14:49:02 +0200 [thread overview] Message-ID: <1424954949-12801-8-git-send-email-tomi.valkeinen@ti.com> (raw) In-Reply-To: <1424954949-12801-1-git-send-email-tomi.valkeinen@ti.com> The common 'struct videomode' does not have a flag to select when the sync signals should be driven. The default behavior of DISPC HW is to drive the sync signal on the opposite pixel clock edge from data signal, which is also what the videomode_to_omap_video_timings() uses. However, it looks like what panels usually expect is that the data and sync signals are driven on the same edge, so let's change videomode_to_omap_video_timings() to set the sync_pclk_edge accordingly. Note that this only affect panels drivers that use videomode_to_omap_video_timings(), probably when getting the video timings directly from DT data. The drivers can still configure the sync_pclk_edge independently if they so wish. Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com> --- drivers/video/fbdev/omap2/dss/display.c | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) diff --git a/drivers/video/fbdev/omap2/dss/display.c b/drivers/video/fbdev/omap2/dss/display.c index a6fd2d35ad60..ef5b9027985d 100644 --- a/drivers/video/fbdev/omap2/dss/display.c +++ b/drivers/video/fbdev/omap2/dss/display.c @@ -295,9 +295,7 @@ void videomode_to_omap_video_timings(const struct videomode *vm, OMAPDSS_DRIVE_SIG_RISING_EDGE : OMAPDSS_DRIVE_SIG_FALLING_EDGE; - ovt->sync_pclk_edge = vm->flags & DISPLAY_FLAGS_PIXDATA_POSEDGE ? - OMAPDSS_DRIVE_SIG_FALLING_EDGE : - OMAPDSS_DRIVE_SIG_RISING_EDGE; + ovt->sync_pclk_edge = ovt->data_pclk_edge; } EXPORT_SYMBOL(videomode_to_omap_video_timings); -- 2.3.0
next prev parent reply other threads:[~2015-02-26 12:49 UTC|newest] Thread overview: 30+ messages / expand[flat|nested] mbox.gz Atom feed top 2015-02-26 12:48 [PATCH 01/15] OMAPDSS: fix AM43xx minimum pixel clock divider Tomi Valkeinen 2015-02-26 12:48 ` Tomi Valkeinen 2015-02-26 12:48 ` [PATCH 02/15] OMAPDSS: HDMI5: Increase DDC SDA-HOLD time Tomi Valkeinen 2015-02-26 12:48 ` Tomi Valkeinen 2015-02-26 12:48 ` [PATCH 03/15] OMAPDSS: fix paddr check for TILER addresses Tomi Valkeinen 2015-02-26 12:48 ` Tomi Valkeinen 2015-02-26 12:48 ` [PATCH 04/15] OMAPDSS: TFP410: fix input sync signals Tomi Valkeinen 2015-02-26 12:48 ` Tomi Valkeinen 2015-02-26 12:48 ` [PATCH 05/15] OMAPDSS: DISPC: remove OMAPDSS_DRIVE_SIG_OPPOSITE_EDGES Tomi Valkeinen 2015-02-26 12:48 ` Tomi Valkeinen 2015-02-26 12:49 ` [PATCH 06/15] OMAPDSS: DISPC: explicit handling for sync and de levels Tomi Valkeinen 2015-02-26 12:49 ` Tomi Valkeinen 2015-02-26 12:49 ` [PATCH 07/15] OMAPDSS: change signal_level & signal_edge enum values Tomi Valkeinen 2015-02-26 12:49 ` Tomi Valkeinen 2015-02-26 12:49 ` Tomi Valkeinen [this message] 2015-02-26 12:49 ` [PATCH 08/15] OMAPDSS: DISPC: change sync_pclk_edge default value Tomi Valkeinen 2015-02-26 12:49 ` [PATCH 09/15] OMAPDSS: DISPC: fix div by zero issue in overlay scaling Tomi Valkeinen 2015-02-26 12:49 ` Tomi Valkeinen 2015-02-26 12:49 ` [PATCH 10/15] OMAPDSS: DISPC: lock access to DISPC_CONTROL & DISPC_CONFIG Tomi Valkeinen 2015-02-26 12:49 ` Tomi Valkeinen 2015-02-26 12:49 ` [PATCH 11/15] OMAPDSS: setup default fifo thresholds Tomi Valkeinen 2015-02-26 12:49 ` Tomi Valkeinen 2015-02-26 12:49 ` [PATCH 12/15] OMAPDSS: Add support for MFLAG Tomi Valkeinen 2015-02-26 12:49 ` Tomi Valkeinen 2015-02-26 12:49 ` [PATCH 13/15] OMAPDSS: workaround for MFLAG + NV12 issue Tomi Valkeinen 2015-02-26 12:49 ` Tomi Valkeinen 2015-02-26 12:49 ` [PATCH 14/15] OMAPDSS: HDMI: hdmi synclost work-around Tomi Valkeinen 2015-02-26 12:49 ` Tomi Valkeinen 2015-02-26 12:49 ` [PATCH 15/15] OMAPDSS: disable VT switch Tomi Valkeinen 2015-02-26 12:49 ` Tomi Valkeinen
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