[PATCH v2 6/9] drm/i915: Pass the primary plane position to .update_primary_plane()

[ville.syrjala@linux.intel.com]

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

In preparation for changing the primary plane position pass the clipped
position to .update_primary_plane().

v2: Rebased

Cc: Sonika Jindal <sonika.jindal@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/i915_drv.h      |  1 +
 drivers/gpu/drm/i915/intel_display.c | 20 +++++++++++++++-----
 2 files changed, 16 insertions(+), 5 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 054be42..c42e3c5 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -583,6 +583,7 @@ struct drm_i915_display_funcs {
 				     struct drm_framebuffer *fb,
 				     int x, int y,
 				     int src_w, int src_h,
+				     int crtc_x, int crtc_y,
 				     int crtc_w, int crtc_h);
 	void (*hpd_irq_setup)(struct drm_device *dev);
 	/* clock updates for mode set */
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 2e9fdaa..362089f 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -2484,6 +2484,7 @@ static void i9xx_update_primary_plane(struct drm_crtc *crtc,
 				      struct drm_framebuffer *fb,
 				      int x, int y,
 				      int src_w, int src_h,
+				      int crtc_x, int crtc_y,
 				      int crtc_w, int crtc_h)
 {
 	struct drm_device *dev = crtc->dev;
@@ -2523,13 +2524,14 @@ static void i9xx_update_primary_plane(struct drm_crtc *crtc,
 		if (intel_crtc->pipe == PIPE_B)
 			dspcntr |= DISPPLANE_SEL_PIPE_B;
 		I915_WRITE(DSPSIZE(plane), ((crtc_h - 1) << 16) | (crtc_w - 1));
-		I915_WRITE(DSPPOS(plane), 0);
+		I915_WRITE(DSPPOS(plane), (crtc_y << 16) | crtc_x);
 	} else if (IS_CHERRYVIEW(dev) && plane == PLANE_B) {
 		I915_WRITE(PRIMSIZE(plane), ((crtc_h - 1) << 16) | (crtc_w - 1));
-		I915_WRITE(PRIMPOS(plane), 0);
+		I915_WRITE(PRIMPOS(plane), (crtc_y << 16) | crtc_x);
 		I915_WRITE(PRIMCNSTALPHA(plane), 0);
 	} else {
-		WARN_ONCE(crtc_w != intel_crtc->config->pipe_src_w ||
+		WARN_ONCE(crtc_x != 0 || crtc_y != 0 ||
+			  crtc_w != intel_crtc->config->pipe_src_w ||
 			  crtc_h != intel_crtc->config->pipe_src_h,
 			  "primary plane size doesn't match pipe size\n");
 	}
@@ -2614,6 +2616,7 @@ static void ironlake_update_primary_plane(struct drm_crtc *crtc,
 					  struct drm_framebuffer *fb,
 					  int x, int y,
 					  int src_w, int src_h,
+					  int crtc_x, int crtc_y,
 					  int crtc_w, int crtc_h)
 {
 	struct drm_device *dev = crtc->dev;
@@ -2649,7 +2652,8 @@ static void ironlake_update_primary_plane(struct drm_crtc *crtc,
 	WARN_ONCE(src_w != crtc_w || src_h != crtc_h,
 		  "primary plane doesn't support scaling\n");
 
-	WARN_ONCE(crtc_w != intel_crtc->config->pipe_src_w ||
+	WARN_ONCE(crtc_x != 0 || crtc_y != 0 ||
+		  crtc_w != intel_crtc->config->pipe_src_w ||
 		  crtc_h != intel_crtc->config->pipe_src_h,
 		  "primary plane size doesn't match pipe size\n");
 
@@ -2759,6 +2763,7 @@ static void skylake_update_primary_plane(struct drm_crtc *crtc,
 					 struct drm_framebuffer *fb,
 					 int x, int y,
 					 int src_w, int src_h,
+					 int crtc_x, int crtc_y,
 					 int crtc_w, int crtc_h)
 {
 	struct drm_device *dev = crtc->dev;
@@ -2839,7 +2844,7 @@ static void skylake_update_primary_plane(struct drm_crtc *crtc,
 
 	I915_WRITE(PLANE_CTL(pipe, 0), plane_ctl);
 
-	I915_WRITE(PLANE_POS(pipe, 0), 0);
+	I915_WRITE(PLANE_POS(pipe, 0), (crtc_y << 16) | crtc_x);
 	I915_WRITE(PLANE_OFFSET(pipe, 0), (y << 16) | x);
 	I915_WRITE(PLANE_SIZE(pipe, 0), ((src_h - 1) << 16) | (src_w - 1));
 	I915_WRITE(PLANE_STRIDE(pipe, 0), fb->pitches[0] / stride_div);
@@ -2866,6 +2871,7 @@ intel_pipe_set_base_atomic(struct drm_crtc *crtc, struct drm_framebuffer *fb,
 	/* FIXME: this will go badly if the fb isn't big enough */
 	to_intel_crtc(crtc)->primary_enabled = true;
 	dev_priv->display.update_primary_plane(crtc, fb, x, y,
+					       0, 0,
 					       intel_crtc->config->pipe_src_w,
 					       intel_crtc->config->pipe_src_h,
 					       intel_crtc->config->pipe_src_w,
@@ -2907,6 +2913,8 @@ static void intel_update_primary_planes(struct drm_device *dev)
 							       state->src.y1 >> 16,
 							       drm_rect_width(&state->src) >> 16,
 							       drm_rect_height(&state->src) >> 16,
+							       state->dst.x1,
+							       state->dst.y1,
 							       drm_rect_width(&state->dst),
 							       drm_rect_height(&state->dst));
 		}
@@ -12096,6 +12104,8 @@ intel_commit_primary_plane(struct drm_plane *plane,
 						       state->src.y1 >> 16,
 						       drm_rect_width(&state->src) >> 16,
 						       drm_rect_height(&state->src) >> 16,
+						       state->dst.x1,
+						       state->dst.y1,
 						       drm_rect_width(&state->dst),
 						       drm_rect_height(&state->dst));
 	}
-- 
2.0.5

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