From: Kishon Vijay Abraham I <kishon@ti.com> To: <bhelgaas@google.com>, <jingoohan1@gmail.com>, <pratyush.anand@gmail.com>, <linux-omap@vger.kernel.org>, <linux-pci@vger.kernel.org>, <linux-kernel@vger.kernel.org>, <kishon@ti.com> Cc: <nsekhar@ti.com> Subject: [PATCH 2/3] PCI: host: pcie-designware: add support for suspend and resume Date: Fri, 3 Jul 2015 16:33:44 +0530 [thread overview] Message-ID: <1435921425-15121-3-git-send-email-kishon@ti.com> (raw) In-Reply-To: <1435921425-15121-1-git-send-email-kishon@ti.com> Certain platforms require MSE bit to be cleared to set the master in standby mode. (In DRA7xx TRM_vE, section 24.9.4.5.2.2.1 PCIe Controller Master Standby Behavior advises to use the clearing of the local MSE bit to set the master in standby. Without this some of the clocks do not idle). Cleared the MSE bit on suspend and enabled it back on resume. This is required to get suspend/resume working. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Sekhar Nori <nsekhar@ti.com> --- drivers/pci/host/pcie-designware.c | 20 ++++++++++++++++++++ drivers/pci/host/pcie-designware.h | 2 ++ 2 files changed, 22 insertions(+) diff --git a/drivers/pci/host/pcie-designware.c b/drivers/pci/host/pcie-designware.c index 69486be..cfb2bd6 100644 --- a/drivers/pci/host/pcie-designware.c +++ b/drivers/pci/host/pcie-designware.c @@ -811,6 +811,26 @@ void dw_pcie_setup_rc(struct pcie_port *pp) dw_pcie_writel_rc(pp, val, PCI_COMMAND); } +void dw_pcie_suspend_rc(struct pcie_port *pp) +{ + u32 val; + + /* clear MSE */ + dw_pcie_readl_rc(pp, PCI_COMMAND, &val); + val &= ~PCI_COMMAND_MEMORY; + dw_pcie_writel_rc(pp, val, PCI_COMMAND); +} + +void dw_pcie_resume_rc(struct pcie_port *pp) +{ + u32 val; + + /* set MSE */ + dw_pcie_readl_rc(pp, PCI_COMMAND, &val); + val |= PCI_COMMAND_MEMORY; + dw_pcie_writel_rc(pp, val, PCI_COMMAND); +} + MODULE_AUTHOR("Jingoo Han <jg1.han@samsung.com>"); MODULE_DESCRIPTION("Designware PCIe host controller driver"); MODULE_LICENSE("GPL v2"); diff --git a/drivers/pci/host/pcie-designware.h b/drivers/pci/host/pcie-designware.h index d0bbd27..0df2dfa 100644 --- a/drivers/pci/host/pcie-designware.h +++ b/drivers/pci/host/pcie-designware.h @@ -83,5 +83,7 @@ void dw_pcie_msi_init(struct pcie_port *pp); int dw_pcie_link_up(struct pcie_port *pp); void dw_pcie_setup_rc(struct pcie_port *pp); int dw_pcie_host_init(struct pcie_port *pp); +void dw_pcie_suspend_rc(struct pcie_port *pp); +void dw_pcie_resume_rc(struct pcie_port *pp); #endif /* _PCIE_DESIGNWARE_H */ -- 1.7.9.5
WARNING: multiple messages have this Message-ID (diff)
From: Kishon Vijay Abraham I <kishon@ti.com> To: bhelgaas@google.com, jingoohan1@gmail.com, pratyush.anand@gmail.com, linux-omap@vger.kernel.org, linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org, kishon@ti.com Cc: nsekhar@ti.com Subject: [PATCH 2/3] PCI: host: pcie-designware: add support for suspend and resume Date: Fri, 3 Jul 2015 16:33:44 +0530 [thread overview] Message-ID: <1435921425-15121-3-git-send-email-kishon@ti.com> (raw) In-Reply-To: <1435921425-15121-1-git-send-email-kishon@ti.com> Certain platforms require MSE bit to be cleared to set the master in standby mode. (In DRA7xx TRM_vE, section 24.9.4.5.2.2.1 PCIe Controller Master Standby Behavior advises to use the clearing of the local MSE bit to set the master in standby. Without this some of the clocks do not idle). Cleared the MSE bit on suspend and enabled it back on resume. This is required to get suspend/resume working. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Sekhar Nori <nsekhar@ti.com> --- drivers/pci/host/pcie-designware.c | 20 ++++++++++++++++++++ drivers/pci/host/pcie-designware.h | 2 ++ 2 files changed, 22 insertions(+) diff --git a/drivers/pci/host/pcie-designware.c b/drivers/pci/host/pcie-designware.c index 69486be..cfb2bd6 100644 --- a/drivers/pci/host/pcie-designware.c +++ b/drivers/pci/host/pcie-designware.c @@ -811,6 +811,26 @@ void dw_pcie_setup_rc(struct pcie_port *pp) dw_pcie_writel_rc(pp, val, PCI_COMMAND); } +void dw_pcie_suspend_rc(struct pcie_port *pp) +{ + u32 val; + + /* clear MSE */ + dw_pcie_readl_rc(pp, PCI_COMMAND, &val); + val &= ~PCI_COMMAND_MEMORY; + dw_pcie_writel_rc(pp, val, PCI_COMMAND); +} + +void dw_pcie_resume_rc(struct pcie_port *pp) +{ + u32 val; + + /* set MSE */ + dw_pcie_readl_rc(pp, PCI_COMMAND, &val); + val |= PCI_COMMAND_MEMORY; + dw_pcie_writel_rc(pp, val, PCI_COMMAND); +} + MODULE_AUTHOR("Jingoo Han <jg1.han@samsung.com>"); MODULE_DESCRIPTION("Designware PCIe host controller driver"); MODULE_LICENSE("GPL v2"); diff --git a/drivers/pci/host/pcie-designware.h b/drivers/pci/host/pcie-designware.h index d0bbd27..0df2dfa 100644 --- a/drivers/pci/host/pcie-designware.h +++ b/drivers/pci/host/pcie-designware.h @@ -83,5 +83,7 @@ void dw_pcie_msi_init(struct pcie_port *pp); int dw_pcie_link_up(struct pcie_port *pp); void dw_pcie_setup_rc(struct pcie_port *pp); int dw_pcie_host_init(struct pcie_port *pp); +void dw_pcie_suspend_rc(struct pcie_port *pp); +void dw_pcie_resume_rc(struct pcie_port *pp); #endif /* _PCIE_DESIGNWARE_H */ -- 1.7.9.5
next prev parent reply other threads:[~2015-07-03 11:04 UTC|newest] Thread overview: 21+ messages / expand[flat|nested] mbox.gz Atom feed top 2015-07-03 11:03 [PATCH 0/3] J6/J6Eco: Add PM support to PCIe Kishon Vijay Abraham I 2015-07-03 11:03 ` Kishon Vijay Abraham I 2015-07-03 11:03 ` [PATCH 1/3] PCI: host: pci-dra7xx: Disable pm_runtime on get_sync failure Kishon Vijay Abraham I 2015-07-03 11:03 ` Kishon Vijay Abraham I 2015-07-03 11:03 ` Kishon Vijay Abraham I [this message] 2015-07-03 11:03 ` [PATCH 2/3] PCI: host: pcie-designware: add support for suspend and resume Kishon Vijay Abraham I 2015-07-10 13:22 ` Pratyush Anand 2015-07-10 14:49 ` Kishon Vijay Abraham I 2015-07-10 14:49 ` Kishon Vijay Abraham I 2015-07-10 15:30 ` Pratyush Anand 2015-07-10 15:41 ` Marek Vasut 2015-07-12 10:31 ` Jingoo Han 2015-07-12 10:31 ` Jingoo Han 2015-07-23 12:50 ` Kishon Vijay Abraham I 2015-07-23 12:50 ` Kishon Vijay Abraham I 2015-07-03 11:03 ` [PATCH 3/3] PCI: host: pci-dra7xx: add pm support to pci dra7xx Kishon Vijay Abraham I 2015-07-03 11:03 ` Kishon Vijay Abraham I 2015-07-03 12:04 ` Grygorii Strashko 2015-07-03 12:04 ` Grygorii Strashko 2015-07-10 14:50 ` Kishon Vijay Abraham I 2015-07-10 14:50 ` Kishon Vijay Abraham I
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