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From: Rajendra Nayak <rnayak@codeaurora.org>
To: sboyd@codeaurora.org, mturquette@baylibre.com
Cc: linux-arm-msm@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org, linux-pm@vger.kernel.org,
	georgi.djakov@linaro.org, svarbanov@mm-sol.com,
	srinivas.kandagatla@linaro.org, sviau@codeaurora.org,
	Rajendra Nayak <rnayak@codeaurora.org>
Subject: [PATCH v7 03/13] clk: qcom: gdsc: Use PM clocks to control gdsc clocks
Date: Tue, 28 Jul 2015 15:03:56 +0530	[thread overview]
Message-ID: <1438076046-4706-4-git-send-email-rnayak@codeaurora.org> (raw)
In-Reply-To: <1438076046-4706-1-git-send-email-rnayak@codeaurora.org>

The devices within a gdsc power domain, quite often have additional
clocks to be turned on/off along with the power domain itself.
Once the drivers for these devices are converted to use runtime PM,
it would be possible to remove all clock handling from the drivers if
the gdsc driver can handle it.
Use PM clocks to add support for this. A list of con_ids[] specified
per gdsc would be the clocks turned on/off on every device start/stop
callbacks.

Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org>
---
 drivers/clk/qcom/gdsc.c | 42 ++++++++++++++++++++++++++++++++++++++++++
 drivers/clk/qcom/gdsc.h |  2 ++
 2 files changed, 44 insertions(+)

diff --git a/drivers/clk/qcom/gdsc.c b/drivers/clk/qcom/gdsc.c
index 3b11f4d..68b810a 100644
--- a/drivers/clk/qcom/gdsc.c
+++ b/drivers/clk/qcom/gdsc.c
@@ -16,6 +16,7 @@
 #include <linux/err.h>
 #include <linux/jiffies.h>
 #include <linux/kernel.h>
+#include <linux/pm_clock.h>
 #include <linux/pm_domain.h>
 #include <linux/regmap.h>
 #include <linux/slab.h>
@@ -108,6 +109,44 @@ static int gdsc_disable(struct generic_pm_domain *domain)
 	return gdsc_toggle_logic(sc, false);
 }
 
+static int gdsc_attach(struct generic_pm_domain *domain, struct device *dev)
+{
+	int ret;
+	struct gdsc *sc = domain_to_gdsc(domain);
+	const char **con_id;
+
+	if (!sc->con_ids[0])
+		return 0;
+
+	ret = pm_clk_create(dev);
+	if (ret) {
+		dev_dbg(dev, "pm_clk_create failed %d\n", ret);
+		return ret;
+	}
+
+	for (con_id = sc->con_ids; *con_id; con_id++) {
+		ret = pm_clk_add(dev, *con_id);
+		if (ret) {
+			dev_dbg(dev, "pm_clk_add failed %d\n", ret);
+			goto fail;
+		}
+	}
+	return 0;
+fail:
+	pm_clk_destroy(dev);
+	return ret;
+};
+
+static void gdsc_detach(struct generic_pm_domain *domain, struct device *dev)
+{
+	struct gdsc *sc = domain_to_gdsc(domain);
+
+	if (!sc->con_ids[0])
+		return;
+
+	pm_clk_destroy(dev);
+};
+
 static int gdsc_init(struct gdsc *sc)
 {
 	u32 mask, val;
@@ -131,6 +170,9 @@ static int gdsc_init(struct gdsc *sc)
 
 	sc->pd.power_off = gdsc_disable;
 	sc->pd.power_on = gdsc_enable;
+	sc->pd.attach_dev = gdsc_attach;
+	sc->pd.detach_dev = gdsc_detach;
+	sc->pd.flags = GENPD_FLAG_PM_CLK;
 	pm_genpd_init(&sc->pd, NULL, !on);
 
 	return 0;
diff --git a/drivers/clk/qcom/gdsc.h b/drivers/clk/qcom/gdsc.h
index f578a0c..68bcda3 100644
--- a/drivers/clk/qcom/gdsc.h
+++ b/drivers/clk/qcom/gdsc.h
@@ -24,11 +24,13 @@ struct regmap;
  * @pd: generic power domain
  * @regmap: regmap for MMIO accesses
  * @gdscr: gsdc control register
+ * @con_ids: List of clocks to be controlled for the gdsc
  */
 struct gdsc {
 	struct generic_pm_domain	pd;
 	struct regmap			*regmap;
 	unsigned int			gdscr;
+	const char			*con_ids[];
 };
 
 #ifdef CONFIG_QCOM_GDSC
-- 
QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member
of Code Aurora Forum, hosted by The Linux Foundation

WARNING: multiple messages have this Message-ID (diff)
From: rnayak@codeaurora.org (Rajendra Nayak)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v7 03/13] clk: qcom: gdsc: Use PM clocks to control gdsc clocks
Date: Tue, 28 Jul 2015 15:03:56 +0530	[thread overview]
Message-ID: <1438076046-4706-4-git-send-email-rnayak@codeaurora.org> (raw)
In-Reply-To: <1438076046-4706-1-git-send-email-rnayak@codeaurora.org>

The devices within a gdsc power domain, quite often have additional
clocks to be turned on/off along with the power domain itself.
Once the drivers for these devices are converted to use runtime PM,
it would be possible to remove all clock handling from the drivers if
the gdsc driver can handle it.
Use PM clocks to add support for this. A list of con_ids[] specified
per gdsc would be the clocks turned on/off on every device start/stop
callbacks.

Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org>
---
 drivers/clk/qcom/gdsc.c | 42 ++++++++++++++++++++++++++++++++++++++++++
 drivers/clk/qcom/gdsc.h |  2 ++
 2 files changed, 44 insertions(+)

diff --git a/drivers/clk/qcom/gdsc.c b/drivers/clk/qcom/gdsc.c
index 3b11f4d..68b810a 100644
--- a/drivers/clk/qcom/gdsc.c
+++ b/drivers/clk/qcom/gdsc.c
@@ -16,6 +16,7 @@
 #include <linux/err.h>
 #include <linux/jiffies.h>
 #include <linux/kernel.h>
+#include <linux/pm_clock.h>
 #include <linux/pm_domain.h>
 #include <linux/regmap.h>
 #include <linux/slab.h>
@@ -108,6 +109,44 @@ static int gdsc_disable(struct generic_pm_domain *domain)
 	return gdsc_toggle_logic(sc, false);
 }
 
+static int gdsc_attach(struct generic_pm_domain *domain, struct device *dev)
+{
+	int ret;
+	struct gdsc *sc = domain_to_gdsc(domain);
+	const char **con_id;
+
+	if (!sc->con_ids[0])
+		return 0;
+
+	ret = pm_clk_create(dev);
+	if (ret) {
+		dev_dbg(dev, "pm_clk_create failed %d\n", ret);
+		return ret;
+	}
+
+	for (con_id = sc->con_ids; *con_id; con_id++) {
+		ret = pm_clk_add(dev, *con_id);
+		if (ret) {
+			dev_dbg(dev, "pm_clk_add failed %d\n", ret);
+			goto fail;
+		}
+	}
+	return 0;
+fail:
+	pm_clk_destroy(dev);
+	return ret;
+};
+
+static void gdsc_detach(struct generic_pm_domain *domain, struct device *dev)
+{
+	struct gdsc *sc = domain_to_gdsc(domain);
+
+	if (!sc->con_ids[0])
+		return;
+
+	pm_clk_destroy(dev);
+};
+
 static int gdsc_init(struct gdsc *sc)
 {
 	u32 mask, val;
@@ -131,6 +170,9 @@ static int gdsc_init(struct gdsc *sc)
 
 	sc->pd.power_off = gdsc_disable;
 	sc->pd.power_on = gdsc_enable;
+	sc->pd.attach_dev = gdsc_attach;
+	sc->pd.detach_dev = gdsc_detach;
+	sc->pd.flags = GENPD_FLAG_PM_CLK;
 	pm_genpd_init(&sc->pd, NULL, !on);
 
 	return 0;
diff --git a/drivers/clk/qcom/gdsc.h b/drivers/clk/qcom/gdsc.h
index f578a0c..68bcda3 100644
--- a/drivers/clk/qcom/gdsc.h
+++ b/drivers/clk/qcom/gdsc.h
@@ -24,11 +24,13 @@ struct regmap;
  * @pd: generic power domain
  * @regmap: regmap for MMIO accesses
  * @gdscr: gsdc control register
+ * @con_ids: List of clocks to be controlled for the gdsc
  */
 struct gdsc {
 	struct generic_pm_domain	pd;
 	struct regmap			*regmap;
 	unsigned int			gdscr;
+	const char			*con_ids[];
 };
 
 #ifdef CONFIG_QCOM_GDSC
-- 
QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member
of Code Aurora Forum, hosted by The Linux Foundation

  parent reply	other threads:[~2015-07-28  9:35 UTC|newest]

Thread overview: 42+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-07-28  9:33 [PATCH v7 00/13] qcom: Add support for GDSCs Rajendra Nayak
2015-07-28  9:33 ` Rajendra Nayak
2015-07-28  9:33 ` [PATCH v7 01/13] clk: " Rajendra Nayak
2015-07-28  9:33   ` Rajendra Nayak
2015-07-31 16:22   ` Bjorn Andersson
2015-07-31 16:22     ` Bjorn Andersson
2015-08-05  5:28     ` Rajendra Nayak
2015-08-05  5:28       ` Rajendra Nayak
2015-08-03 19:24   ` Stephen Boyd
2015-08-03 19:24     ` Stephen Boyd
2015-08-05  5:31     ` Rajendra Nayak
2015-08-05  5:31       ` Rajendra Nayak
2015-08-07 23:52       ` Stephen Boyd
2015-08-07 23:52         ` Stephen Boyd
2015-07-28  9:33 ` [PATCH v7 02/13] clk: qcom: gdsc: Prepare common clk probe to register gdscs Rajendra Nayak
2015-07-28  9:33   ` Rajendra Nayak
2015-07-28  9:33 ` Rajendra Nayak [this message]
2015-07-28  9:33   ` [PATCH v7 03/13] clk: qcom: gdsc: Use PM clocks to control gdsc clocks Rajendra Nayak
2015-07-28  9:33 ` [PATCH v7 04/13] clk: qcom: gdsc: Manage clocks with !CONFIG_PM Rajendra Nayak
2015-07-28  9:33   ` Rajendra Nayak
2015-07-28  9:33 ` [PATCH v7 05/13] clk: qcom: gdsc: Enable an RCG before turing on the gdsc Rajendra Nayak
2015-07-28  9:33   ` Rajendra Nayak
2015-07-28  9:33 ` [PATCH v7 06/13] clk: qcom: gdsc: Add support for Memory RET/OFF Rajendra Nayak
2015-07-28  9:33   ` Rajendra Nayak
2015-07-28  9:34 ` [PATCH v7 07/13] clk: qcom: gdsc: Add support for ON only state Rajendra Nayak
2015-07-28  9:34   ` Rajendra Nayak
2015-07-28  9:34 ` [PATCH v7 08/13] clk: qcom: gdsc: Add GDSCs in msm8916 GCC Rajendra Nayak
2015-07-28  9:34   ` Rajendra Nayak
2015-07-28  9:34 ` [PATCH v7 09/13] clk: qcom: gdsc: Add GDSCs in msm8974 GCC Rajendra Nayak
2015-07-28  9:34   ` Rajendra Nayak
2015-07-28  9:34 ` [PATCH v7 10/13] clk: qcom: gdsc: Add GDSCs in msm8974 MMCC Rajendra Nayak
2015-07-28  9:34   ` Rajendra Nayak
2015-07-28  9:34 ` [PATCH v7 11/13] clk: qcom: gdsc: Add GDSCs in apq8084 GCC Rajendra Nayak
2015-07-28  9:34   ` Rajendra Nayak
2015-07-28  9:34 ` [PATCH v7 12/13] clk: qcom: gdsc: Add GDSCs in apq8084 MMCC Rajendra Nayak
2015-07-28  9:34   ` Rajendra Nayak
2015-07-31 14:54   ` Stanimir Varbanov
2015-07-31 14:54     ` Stanimir Varbanov
2015-08-06 10:31     ` Rajendra Nayak
2015-08-06 10:31       ` Rajendra Nayak
2015-07-28  9:34 ` [PATCH v7 13/13] arm: dts: qcom: Add #power-domain-cells property Rajendra Nayak
2015-07-28  9:34   ` Rajendra Nayak

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