From: Ludovic Desroches <ludovic.desroches@atmel.com> To: <linux-mmc@vger.kernel.org>, <linux-kernel@vger.kernel.org>, <devicetree@vger.kernel.org> Cc: <ulf.hansson@linaro.org>, <nicolas.ferre@atmel.com>, <alexandre.belloni@free-electrons.com>, <pebolle@tiscali.nl>, <arnd@arndb.de>, Ludovic Desroches <ludovic.desroches@atmel.com> Subject: [PATCH v2 1/3] mmc: sdhci: switch from programmable clock mode to divided one if needed Date: Wed, 29 Jul 2015 16:22:46 +0200 [thread overview] Message-ID: <1438179768-818-2-git-send-email-ludovic.desroches@atmel.com> (raw) In-Reply-To: <1438179768-818-1-git-send-email-ludovic.desroches@atmel.com> In programmable mode, if the clock frequency is too high, the divider can be too small to meet the clock frequency requirement especially to init the SD card. In this case, switch to the divided clock mode. Signed-off-by: Ludovic Desroches <ludovic.desroches@atmel.com> --- drivers/mmc/host/sdhci.c | 29 ++++++++++++++++++++--------- 1 file changed, 20 insertions(+), 9 deletions(-) diff --git a/drivers/mmc/host/sdhci.c b/drivers/mmc/host/sdhci.c index bc14452..32cf274 100644 --- a/drivers/mmc/host/sdhci.c +++ b/drivers/mmc/host/sdhci.c @@ -1152,6 +1152,7 @@ void sdhci_set_clock(struct sdhci_host *host, unsigned int clock) int real_div = div, clk_mul = 1; u16 clk = 0; unsigned long timeout; + bool switch_base_clk = false; host->mmc->actual_clock = 0; @@ -1189,15 +1190,25 @@ void sdhci_set_clock(struct sdhci_host *host, unsigned int clock) <= clock) break; } - /* - * Set Programmable Clock Mode in the Clock - * Control register. - */ - clk = SDHCI_PROG_CLOCK_MODE; - real_div = div; - clk_mul = host->clk_mul; - div--; - } else { + if ((host->max_clk * host->clk_mul / div) <= clock) { + /* + * Set Programmable Clock Mode in the Clock + * Control register. + */ + clk = SDHCI_PROG_CLOCK_MODE; + real_div = div; + clk_mul = host->clk_mul; + div--; + } else { + /* + * Divisor can be too small to reach clock + * speed requirement. Then use the base clock. + */ + switch_base_clk = true; + } + } + + if (!host->clk_mul || switch_base_clk) { /* Version 3.00 divisors must be a multiple of 2. */ if (host->max_clk <= clock) div = 1; -- 2.5.0
WARNING: multiple messages have this Message-ID (diff)
From: Ludovic Desroches <ludovic.desroches@atmel.com> To: linux-mmc@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org Cc: ulf.hansson@linaro.org, nicolas.ferre@atmel.com, alexandre.belloni@free-electrons.com, pebolle@tiscali.nl, arnd@arndb.de, Ludovic Desroches <ludovic.desroches@atmel.com> Subject: [PATCH v2 1/3] mmc: sdhci: switch from programmable clock mode to divided one if needed Date: Wed, 29 Jul 2015 16:22:46 +0200 [thread overview] Message-ID: <1438179768-818-2-git-send-email-ludovic.desroches@atmel.com> (raw) In-Reply-To: <1438179768-818-1-git-send-email-ludovic.desroches@atmel.com> In programmable mode, if the clock frequency is too high, the divider can be too small to meet the clock frequency requirement especially to init the SD card. In this case, switch to the divided clock mode. Signed-off-by: Ludovic Desroches <ludovic.desroches@atmel.com> --- drivers/mmc/host/sdhci.c | 29 ++++++++++++++++++++--------- 1 file changed, 20 insertions(+), 9 deletions(-) diff --git a/drivers/mmc/host/sdhci.c b/drivers/mmc/host/sdhci.c index bc14452..32cf274 100644 --- a/drivers/mmc/host/sdhci.c +++ b/drivers/mmc/host/sdhci.c @@ -1152,6 +1152,7 @@ void sdhci_set_clock(struct sdhci_host *host, unsigned int clock) int real_div = div, clk_mul = 1; u16 clk = 0; unsigned long timeout; + bool switch_base_clk = false; host->mmc->actual_clock = 0; @@ -1189,15 +1190,25 @@ void sdhci_set_clock(struct sdhci_host *host, unsigned int clock) <= clock) break; } - /* - * Set Programmable Clock Mode in the Clock - * Control register. - */ - clk = SDHCI_PROG_CLOCK_MODE; - real_div = div; - clk_mul = host->clk_mul; - div--; - } else { + if ((host->max_clk * host->clk_mul / div) <= clock) { + /* + * Set Programmable Clock Mode in the Clock + * Control register. + */ + clk = SDHCI_PROG_CLOCK_MODE; + real_div = div; + clk_mul = host->clk_mul; + div--; + } else { + /* + * Divisor can be too small to reach clock + * speed requirement. Then use the base clock. + */ + switch_base_clk = true; + } + } + + if (!host->clk_mul || switch_base_clk) { /* Version 3.00 divisors must be a multiple of 2. */ if (host->max_clk <= clock) div = 1; -- 2.5.0
next prev parent reply other threads:[~2015-07-29 14:22 UTC|newest] Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top 2015-07-29 14:22 [PATCH v2 0/3] introduce driver for the Atmel SDMMC Ludovic Desroches 2015-07-29 14:22 ` Ludovic Desroches 2015-07-29 14:22 ` Ludovic Desroches [this message] 2015-07-29 14:22 ` [PATCH v2 1/3] mmc: sdhci: switch from programmable clock mode to divided one if needed Ludovic Desroches 2015-07-29 14:22 ` [PATCH v2 2/3] mmc: sdhci-of-at91: introduce driver for the Atmel SDMMC Ludovic Desroches 2015-07-29 14:22 ` Ludovic Desroches 2015-07-29 14:22 ` [PATCH v2 3/3] MAINTAINERS: add entry for Atmel sdhci-of-at91 driver Ludovic Desroches 2015-07-29 14:22 ` Ludovic Desroches 2015-08-18 8:32 ` [PATCH v2 0/3] introduce driver for the Atmel SDMMC Ludovic Desroches 2015-08-18 8:32 ` Ludovic Desroches 2015-08-25 12:07 ` Ulf Hansson
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