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From: Will Deacon <will.deacon-5wv7dgnIgG8@public.gmane.org>
To: iommu-cunTk1MwBs9QetFLy7KEm3xJsTq8ys+cHZ5vskTnxNA@public.gmane.org
Cc: jroedel-l3A5Bk7waGM@public.gmane.org,
	marc.zyngier-5wv7dgnIgG8@public.gmane.org,
	Will Deacon <will.deacon-5wv7dgnIgG8@public.gmane.org>,
	laurent.pinchart+renesas-ryLnwIuWjnjg/C1BVhZhaw@public.gmane.org,
	linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org
Subject: [PATCH 02/13] iommu/arm-smmu: Fix MSI memory attributes to match specification
Date: Mon,  3 Aug 2015 14:25:44 +0100	[thread overview]
Message-ID: <1438608355-7335-3-git-send-email-will.deacon@arm.com> (raw)
In-Reply-To: <1438608355-7335-1-git-send-email-will.deacon-5wv7dgnIgG8@public.gmane.org>

From: Marc Zyngier <marc.zyngier-5wv7dgnIgG8@public.gmane.org>

The MSI memory attributes in the SMMUv3 driver are from an older
revision of the spec, which doesn't match the current implementations.

Out with the old, in with the new.

Signed-off-by: Marc Zyngier <marc.zyngier-5wv7dgnIgG8@public.gmane.org>
Signed-off-by: Will Deacon <will.deacon-5wv7dgnIgG8@public.gmane.org>
---
 drivers/iommu/arm-smmu-v3.c | 12 ++++++------
 1 file changed, 6 insertions(+), 6 deletions(-)

diff --git a/drivers/iommu/arm-smmu-v3.c b/drivers/iommu/arm-smmu-v3.c
index 5d2cbdab5afa..c2c1ad8915d9 100644
--- a/drivers/iommu/arm-smmu-v3.c
+++ b/drivers/iommu/arm-smmu-v3.c
@@ -174,14 +174,14 @@
 #define ARM_SMMU_PRIQ_IRQ_CFG2		0xdc
 
 /* Common MSI config fields */
-#define MSI_CFG0_SH_SHIFT		60
-#define MSI_CFG0_SH_NSH			(0UL << MSI_CFG0_SH_SHIFT)
-#define MSI_CFG0_SH_OSH			(2UL << MSI_CFG0_SH_SHIFT)
-#define MSI_CFG0_SH_ISH			(3UL << MSI_CFG0_SH_SHIFT)
-#define MSI_CFG0_MEMATTR_SHIFT		56
-#define MSI_CFG0_MEMATTR_DEVICE_nGnRE	(0x1 << MSI_CFG0_MEMATTR_SHIFT)
 #define MSI_CFG0_ADDR_SHIFT		2
 #define MSI_CFG0_ADDR_MASK		0x3fffffffffffUL
+#define MSI_CFG2_SH_SHIFT		4
+#define MSI_CFG2_SH_NSH			(0UL << MSI_CFG2_SH_SHIFT)
+#define MSI_CFG2_SH_OSH			(2UL << MSI_CFG2_SH_SHIFT)
+#define MSI_CFG2_SH_ISH			(3UL << MSI_CFG2_SH_SHIFT)
+#define MSI_CFG2_MEMATTR_SHIFT		0
+#define MSI_CFG2_MEMATTR_DEVICE_nGnRE	(0x1 << MSI_CFG2_MEMATTR_SHIFT)
 
 #define Q_IDX(q, p)			((p) & ((1 << (q)->max_n_shift) - 1))
 #define Q_WRP(q, p)			((p) & (1 << (q)->max_n_shift))
-- 
2.1.4

WARNING: multiple messages have this Message-ID (diff)
From: will.deacon@arm.com (Will Deacon)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 02/13] iommu/arm-smmu: Fix MSI memory attributes to match specification
Date: Mon,  3 Aug 2015 14:25:44 +0100	[thread overview]
Message-ID: <1438608355-7335-3-git-send-email-will.deacon@arm.com> (raw)
In-Reply-To: <1438608355-7335-1-git-send-email-will.deacon@arm.com>

From: Marc Zyngier <marc.zyngier@arm.com>

The MSI memory attributes in the SMMUv3 driver are from an older
revision of the spec, which doesn't match the current implementations.

Out with the old, in with the new.

Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
---
 drivers/iommu/arm-smmu-v3.c | 12 ++++++------
 1 file changed, 6 insertions(+), 6 deletions(-)

diff --git a/drivers/iommu/arm-smmu-v3.c b/drivers/iommu/arm-smmu-v3.c
index 5d2cbdab5afa..c2c1ad8915d9 100644
--- a/drivers/iommu/arm-smmu-v3.c
+++ b/drivers/iommu/arm-smmu-v3.c
@@ -174,14 +174,14 @@
 #define ARM_SMMU_PRIQ_IRQ_CFG2		0xdc
 
 /* Common MSI config fields */
-#define MSI_CFG0_SH_SHIFT		60
-#define MSI_CFG0_SH_NSH			(0UL << MSI_CFG0_SH_SHIFT)
-#define MSI_CFG0_SH_OSH			(2UL << MSI_CFG0_SH_SHIFT)
-#define MSI_CFG0_SH_ISH			(3UL << MSI_CFG0_SH_SHIFT)
-#define MSI_CFG0_MEMATTR_SHIFT		56
-#define MSI_CFG0_MEMATTR_DEVICE_nGnRE	(0x1 << MSI_CFG0_MEMATTR_SHIFT)
 #define MSI_CFG0_ADDR_SHIFT		2
 #define MSI_CFG0_ADDR_MASK		0x3fffffffffffUL
+#define MSI_CFG2_SH_SHIFT		4
+#define MSI_CFG2_SH_NSH			(0UL << MSI_CFG2_SH_SHIFT)
+#define MSI_CFG2_SH_OSH			(2UL << MSI_CFG2_SH_SHIFT)
+#define MSI_CFG2_SH_ISH			(3UL << MSI_CFG2_SH_SHIFT)
+#define MSI_CFG2_MEMATTR_SHIFT		0
+#define MSI_CFG2_MEMATTR_DEVICE_nGnRE	(0x1 << MSI_CFG2_MEMATTR_SHIFT)
 
 #define Q_IDX(q, p)			((p) & ((1 << (q)->max_n_shift) - 1))
 #define Q_WRP(q, p)			((p) & (1 << (q)->max_n_shift))
-- 
2.1.4

  parent reply	other threads:[~2015-08-03 13:25 UTC|newest]

Thread overview: 42+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-08-03 13:25 [PATCH 00/13] iommu/arm-smmu: Updates for 4.3 Will Deacon
2015-08-03 13:25 ` Will Deacon
     [not found] ` <1438608355-7335-1-git-send-email-will.deacon-5wv7dgnIgG8@public.gmane.org>
2015-08-03 13:25   ` [PATCH 01/13] iommu/arm-smmu: Fix enabling of PRIQ interrupt Will Deacon
2015-08-03 13:25     ` Will Deacon
2015-08-03 13:25   ` Will Deacon [this message]
2015-08-03 13:25     ` [PATCH 02/13] iommu/arm-smmu: Fix MSI memory attributes to match specification Will Deacon
2015-08-03 13:25   ` [PATCH 03/13] iommu/arm-smmu: Limit 2-level strtab allocation for small SID sizes Will Deacon
2015-08-03 13:25     ` Will Deacon
2015-08-03 13:25   ` [PATCH 04/13] iommu/arm-smmu: Sort out coherency Will Deacon
2015-08-03 13:25     ` Will Deacon
2015-08-03 13:25   ` [PATCH 05/13] iommu/io-pgtable-arm: Allow appropriate DMA API use Will Deacon
2015-08-03 13:25     ` Will Deacon
     [not found]     ` <1438608355-7335-6-git-send-email-will.deacon-5wv7dgnIgG8@public.gmane.org>
2015-08-04 13:16       ` Laurent Pinchart
2015-08-04 13:16         ` Laurent Pinchart
2015-08-04 14:47         ` Robin Murphy
2015-08-04 14:47           ` Robin Murphy
     [not found]           ` <55C0D071.1040104-5wv7dgnIgG8@public.gmane.org>
2015-08-04 14:56             ` Russell King - ARM Linux
2015-08-04 14:56               ` Russell King - ARM Linux
     [not found]               ` <20150804145642.GQ7557-l+eeeJia6m9vn6HldHNs0ANdhmdF6hFW@public.gmane.org>
2015-08-04 20:54                 ` Laurent Pinchart
2015-08-04 20:54                   ` Laurent Pinchart
2015-08-05 16:24                   ` Will Deacon
2015-08-05 16:24                     ` Will Deacon
     [not found]                     ` <20150805162452.GH6092-5wv7dgnIgG8@public.gmane.org>
2015-08-06 19:10                       ` Laurent Pinchart
2015-08-06 19:10                         ` Laurent Pinchart
2015-08-03 13:25   ` [PATCH 06/13] iommu/arm-smmu: Clean up DMA API usage Will Deacon
2015-08-03 13:25     ` Will Deacon
2015-08-03 13:25   ` [PATCH 07/13] " Will Deacon
2015-08-03 13:25     ` Will Deacon
2015-08-03 13:25   ` [PATCH 08/13] iommu/ipmmu-vmsa: " Will Deacon
2015-08-03 13:25     ` Will Deacon
2015-08-03 13:25   ` [PATCH 09/13] iommu/io-pgtable-arm: Centralise sync points Will Deacon
2015-08-03 13:25     ` Will Deacon
2015-08-03 13:25   ` [PATCH 10/13] iommu/arm-smmu: Remove arm_smmu_flush_pgtable() Will Deacon
2015-08-03 13:25     ` Will Deacon
2015-08-03 13:25   ` [PATCH 11/13] " Will Deacon
2015-08-03 13:25     ` Will Deacon
2015-08-03 13:25   ` [PATCH 12/13] iommu/io-pgtable: Remove flush_pgtable callback Will Deacon
2015-08-03 13:25     ` Will Deacon
2015-08-03 13:25   ` [PATCH 13/13] iommu/arm-smmu: Treat unknown OAS as 48-bit Will Deacon
2015-08-03 13:25     ` Will Deacon
     [not found]     ` <1438608355-7335-14-git-send-email-will.deacon-5wv7dgnIgG8@public.gmane.org>
2015-08-03 18:23       ` Sergei Shtylyov
2015-08-03 18:23         ` Sergei Shtylyov

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