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From: Roger Quadros <rogerq@ti.com>
To: <tony@atomide.com>
Cc: <dwmw2@infradead.org>, <computersforpeace@gmail.com>,
	<ezequiel@vanguardiasur.com.ar>, <javier@dowhile0.org>,
	<fcooper@ti.com>, <nsekhar@ti.com>,
	<linux-mtd@lists.infradead.org>, <linux-omap@vger.kernel.org>,
	<devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
	Roger Quadros <rogerq@ti.com>
Subject: [PATCH v2 21/22] ARM: dts: dra7x-evm: Provide NAND ready pin
Date: Fri, 7 Aug 2015 12:12:31 +0300	[thread overview]
Message-ID: <1438938752-31010-22-git-send-email-rogerq@ti.com> (raw)
In-Reply-To: <1438938752-31010-1-git-send-email-rogerq@ti.com>

On these boards NAND ready pin status is avilable over
GPMC_WAIT0 pin.

Read speed increases from 13768 KiB/ to 17246 KiB/s.
Write speed was unchanged at 7123 KiB/s.
Measured using mtd_speedtest.ko.

Signed-off-by: Roger Quadros <rogerq@ti.com>
---
 arch/arm/boot/dts/dra7-evm.dts  | 1 +
 arch/arm/boot/dts/dra72-evm.dts | 1 +
 2 files changed, 2 insertions(+)

diff --git a/arch/arm/boot/dts/dra7-evm.dts b/arch/arm/boot/dts/dra7-evm.dts
index 3fb1ced..b717fd0 100644
--- a/arch/arm/boot/dts/dra7-evm.dts
+++ b/arch/arm/boot/dts/dra7-evm.dts
@@ -575,6 +575,7 @@
 		reg = <0 0 4>;		/* device IO registers */
 		interrupt-parent = <&crossbar_mpu>;
 		interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
+		ready-gpio = <&gpmc 0 GPIO_ACTIVE_HIGH>; /* gpmc_wait0 pin */
 		ti,nand-ecc-opt = "bch8";
 		ti,elm-id = <&elm>;
 		nand-bus-width = <16>;
diff --git a/arch/arm/boot/dts/dra72-evm.dts b/arch/arm/boot/dts/dra72-evm.dts
index fc0677a..c1a3397 100644
--- a/arch/arm/boot/dts/dra72-evm.dts
+++ b/arch/arm/boot/dts/dra72-evm.dts
@@ -387,6 +387,7 @@
 		 */
 		reg = <0 0 4>;		/* device IO registers */
 		interrupt-parent = <&crossbar_mpu>;
+		ready-gpio = <&gpmc 0 GPIO_ACTIVE_HIGH>; /* gpmc_wait0 pin */
 		ti,nand-ecc-opt = "bch8";
 		ti,elm-id = <&elm>;
 		nand-bus-width = <16>;
-- 
2.1.4


WARNING: multiple messages have this Message-ID (diff)
From: Roger Quadros <rogerq@ti.com>
To: tony@atomide.com
Cc: dwmw2@infradead.org, computersforpeace@gmail.com,
	ezequiel@vanguardiasur.com.ar, javier@dowhile0.org,
	fcooper@ti.com, nsekhar@ti.com, linux-mtd@lists.infradead.org,
	linux-omap@vger.kernel.org, devicetree@vger.kernel.org,
	linux-kernel@vger.kernel.org, Roger Quadros <rogerq@ti.com>
Subject: [PATCH v2 21/22] ARM: dts: dra7x-evm: Provide NAND ready pin
Date: Fri, 7 Aug 2015 12:12:31 +0300	[thread overview]
Message-ID: <1438938752-31010-22-git-send-email-rogerq@ti.com> (raw)
In-Reply-To: <1438938752-31010-1-git-send-email-rogerq@ti.com>

On these boards NAND ready pin status is avilable over
GPMC_WAIT0 pin.

Read speed increases from 13768 KiB/ to 17246 KiB/s.
Write speed was unchanged at 7123 KiB/s.
Measured using mtd_speedtest.ko.

Signed-off-by: Roger Quadros <rogerq@ti.com>
---
 arch/arm/boot/dts/dra7-evm.dts  | 1 +
 arch/arm/boot/dts/dra72-evm.dts | 1 +
 2 files changed, 2 insertions(+)

diff --git a/arch/arm/boot/dts/dra7-evm.dts b/arch/arm/boot/dts/dra7-evm.dts
index 3fb1ced..b717fd0 100644
--- a/arch/arm/boot/dts/dra7-evm.dts
+++ b/arch/arm/boot/dts/dra7-evm.dts
@@ -575,6 +575,7 @@
 		reg = <0 0 4>;		/* device IO registers */
 		interrupt-parent = <&crossbar_mpu>;
 		interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
+		ready-gpio = <&gpmc 0 GPIO_ACTIVE_HIGH>; /* gpmc_wait0 pin */
 		ti,nand-ecc-opt = "bch8";
 		ti,elm-id = <&elm>;
 		nand-bus-width = <16>;
diff --git a/arch/arm/boot/dts/dra72-evm.dts b/arch/arm/boot/dts/dra72-evm.dts
index fc0677a..c1a3397 100644
--- a/arch/arm/boot/dts/dra72-evm.dts
+++ b/arch/arm/boot/dts/dra72-evm.dts
@@ -387,6 +387,7 @@
 		 */
 		reg = <0 0 4>;		/* device IO registers */
 		interrupt-parent = <&crossbar_mpu>;
+		ready-gpio = <&gpmc 0 GPIO_ACTIVE_HIGH>; /* gpmc_wait0 pin */
 		ti,nand-ecc-opt = "bch8";
 		ti,elm-id = <&elm>;
 		nand-bus-width = <16>;
-- 
2.1.4

  parent reply	other threads:[~2015-08-07  9:15 UTC|newest]

Thread overview: 57+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-08-07  9:12 [PATCH v2 00/22] memory: omap-gpmc: mtd: nand: Support GPMC NAND on non-OMAP platforms Roger Quadros
2015-08-07  9:12 ` Roger Quadros
2015-08-07  9:12 ` [PATCH v2 01/22] ARM: OMAP2+: gpmc: Add platform data Roger Quadros
2015-08-07  9:12   ` Roger Quadros
2015-08-07  9:12 ` [PATCH v2 02/22] ARM: OMAP2+: gpmc: Add gpmc timings and settings to " Roger Quadros
2015-08-07  9:12   ` Roger Quadros
2015-08-07  9:12 ` [PATCH v2 03/22] memory: omap-gpmc: Introduce GPMC to NAND interface Roger Quadros
2015-08-07  9:12   ` Roger Quadros
2015-08-07  9:12 ` [PATCH v2 04/22] mtd: nand: omap2: Use gpmc_omap_get_nand_ops() to get NAND registers Roger Quadros
2015-08-07  9:12   ` Roger Quadros
2015-08-07  9:12 ` [PATCH v2 05/22] memory: omap-gpmc: Add GPMC-NAND ops to get writebufferempty status Roger Quadros
2015-08-07  9:12   ` Roger Quadros
2015-08-07  9:12 ` [PATCH v2 06/22] mtd: nand: omap2: Switch to using GPMC-NAND ops for writebuffer empty check Roger Quadros
2015-08-07  9:12   ` Roger Quadros
2015-08-13  7:18   ` Roger Quadros
2015-08-13  7:18     ` Roger Quadros
2015-08-07  9:12 ` [PATCH v2 07/22] memory: omap-gpmc: Remove NAND IRQ code Roger Quadros
2015-08-07  9:12   ` Roger Quadros
2015-08-07  9:12 ` [PATCH v2 08/22] memory: omap-gpmc: Add IRQ ops for GPMC-NAND interface Roger Quadros
2015-08-07  9:12   ` Roger Quadros
2015-08-07  9:12 ` [PATCH v2 09/22] mtd: nand: omap2: manage NAND interrupts Roger Quadros
2015-08-07  9:12   ` Roger Quadros
2015-08-07  9:12 ` [PATCH v2 10/22] mtd: nand: omap: Copy platform data parameters to omap_nand_info data Roger Quadros
2015-08-07  9:12   ` Roger Quadros
2015-08-07  9:12 ` [PATCH v2 11/22] mtd: nand: omap: Clean up device tree support Roger Quadros
2015-08-07  9:12   ` Roger Quadros
2015-08-07  9:12 ` [PATCH v2 12/22] mtd: nand: omap: Update DT binding documentation Roger Quadros
2015-08-07  9:12   ` Roger Quadros
2015-08-07  9:12 ` [PATCH v2 13/22] memory: omap-gpmc: Prevent mapping into 1st 16MB Roger Quadros
2015-08-07  9:12   ` Roger Quadros
2015-08-07  9:12 ` [PATCH v2 14/22] ARM: dts: OMAP2+: Fix NAND device nodes Roger Quadros
2015-08-07  9:12   ` Roger Quadros
2015-08-07  9:12 ` [PATCH v2 15/22] memory: omap-gpmc: Move device tree binding to correct location Roger Quadros
2015-08-07  9:12   ` Roger Quadros
2015-08-07  9:12 ` [PATCH v2 16/22] memory: omap-gpmc: Support general purpose input for WAITPINs Roger Quadros
2015-08-07  9:12   ` Roger Quadros
2015-08-13 11:58   ` Roger Quadros
2015-08-13 11:58     ` Roger Quadros
2015-08-07  9:12 ` [PATCH v2 17/22] memory: omap-gpmc: Reserve WAITPIN if needed for WAIT monitoring Roger Quadros
2015-08-07  9:12   ` Roger Quadros
2015-08-07  9:12 ` [PATCH v2 18/22] memory: omap-gpmc: Add irqchip support to the gpiochip Roger Quadros
2015-08-07  9:12   ` Roger Quadros
2015-08-07  9:12 ` [PATCH v2 19/22] ARM: dts: dra7: Enable gpio & interrupt controller for gpmc node Roger Quadros
2015-08-07  9:12   ` Roger Quadros
2015-08-07  9:12 ` [PATCH v2 20/22] mtd: nand: omap2: Implement NAND ready using gpiolib Roger Quadros
2015-08-07  9:12   ` Roger Quadros
2015-08-07  9:12 ` Roger Quadros [this message]
2015-08-07  9:12   ` [PATCH v2 21/22] ARM: dts: dra7x-evm: Provide NAND ready pin Roger Quadros
2015-08-07  9:12 ` [PATCH v2 22/22] memory: omap-gpmc: Prevent GPMC_STATUS from being accessed via gpmc_regs Roger Quadros
2015-08-07  9:12   ` Roger Quadros
2015-08-11 12:48 ` [PATCH v2 00/22] memory: omap-gpmc: mtd: nand: Support GPMC NAND on non-OMAP platforms Tony Lindgren
2015-08-13  7:13   ` Roger Quadros
2015-08-13  7:13     ` Roger Quadros
2015-08-13  8:36     ` Tony Lindgren
2015-08-13  8:36       ` Tony Lindgren
2015-08-13 12:00       ` Roger Quadros
2015-08-13 12:00         ` Roger Quadros

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