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From: Animesh Manna <animesh.manna@intel.com>
To: intel-gfx@lists.freedesktop.org
Subject: [DMC_REDESIGN_V2 14/14] drm/i915/gen9: Corrected the sanity check of mmio address range for csr.
Date: Wed, 26 Aug 2015 16:58:17 +0530	[thread overview]
Message-ID: <1440588497-13954-15-git-send-email-animesh.manna@intel.com> (raw)
In-Reply-To: <1440588497-13954-1-git-send-email-animesh.manna@intel.com>

Condition check for out of boundary for csr address space is corrected
(Thanks to David Binderman for suggestion).

Cc: Imre Deak <imre.deak@intel.com>
Signed-off-by: Animesh Manna <animesh.manna@intel.com>
---
 drivers/gpu/drm/i915/intel_csr.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/intel_csr.c b/drivers/gpu/drm/i915/intel_csr.c
index 3ddf598..477e769 100644
--- a/drivers/gpu/drm/i915/intel_csr.c
+++ b/drivers/gpu/drm/i915/intel_csr.c
@@ -301,7 +301,7 @@ static uint32_t *parse_csr_fw(struct drm_i915_private *dev_priv,
 	}
 	csr->mmio_count = dmc_header->mmio_count;
 	for (i = 0; i < dmc_header->mmio_count; i++) {
-		if (dmc_header->mmioaddr[i] < CSR_MMIO_START_RANGE &&
+		if (dmc_header->mmioaddr[i] < CSR_MMIO_START_RANGE ||
 		    dmc_header->mmioaddr[i] > CSR_MMIO_END_RANGE) {
 			DRM_ERROR(" Firmware has wrong mmio address 0x%x\n",
 				  dmc_header->mmioaddr[i]);
-- 
2.0.2

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  parent reply	other threads:[~2015-08-26 11:28 UTC|newest]

Thread overview: 25+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-08-26 11:28 [DMC_REDESIGN_V2 00/14] Redesign dmc firmware loading Animesh Manna
2015-08-26 11:28 ` [DMC_REDESIGN_V2 01/14] drm/i915/gen9: csr_init after runtime pm enable Animesh Manna
2015-10-13 12:14   ` Imre Deak
2015-08-26 11:28 ` [DMC_REDESIGN_V2 02/14] drm/i915: use correct power domain for csr loading Animesh Manna
2015-08-26 11:28 ` [DMC_REDESIGN_V2 03/14] drm/i915/bxt: release rpm reference if csr firmware failed to load Animesh Manna
2015-09-30 14:24   ` Imre Deak
2015-10-14  6:29     ` Animesh Manna
2015-10-14  8:27       ` Imre Deak
2015-10-14  8:39       ` Jani Nikula
2015-08-26 11:28 ` [DMC_REDESIGN_V2 04/14] drm/i915/gen9: move assert_csr_loaded into intel_rpm.c Animesh Manna
2015-08-26 11:28 ` [DMC_REDESIGN_V2 05/14] drm/i915/gen9: Remove csr.state, csr_lock and related code Animesh Manna
2015-10-22 15:39   ` Imre Deak
2015-08-26 11:28 ` [DMC_REDESIGN_V2 06/14] drm/i915/gen9: Align line continuations in intel_csr.c Animesh Manna
2015-08-26 11:28 ` [DMC_REDESIGN_V2 07/14] drm/i915/gen9: Simplify csr loading failure printing Animesh Manna
2015-09-30 14:28   ` Imre Deak
2015-10-06 19:38     ` Marc Herbert
2015-10-07  8:12       ` Daniel Vetter
2015-08-26 11:28 ` [DMC_REDESIGN_V2 08/14] drm/i915/gen9: extract parse_csr_fw Animesh Manna
2015-08-26 11:28 ` [DMC_REDESIGN_V2 09/14] drm/i915/gen9: Don't try to load garbage dmc firmware on resume Animesh Manna
2015-08-26 11:28 ` [DMC_REDESIGN_V2 10/14] drm/i915/gen9: Use dev_priv in csr functions Animesh Manna
2015-08-26 11:28 ` [DMC_REDESIGN_V2 11/14] drm/i915: Use request_firmware and our own async work Animesh Manna
2015-08-26 11:28 ` [DMC_REDESIGN_V2 12/14] drm/i915/gen9: Use flush_work to synchronize with dmc loader Animesh Manna
2015-08-26 11:28 ` [DMC_REDESIGN_V2 13/14] drm/i915/skl: Removed assert for csr-fw-loading check during disabling dc6 Animesh Manna
2015-08-26 11:28 ` Animesh Manna [this message]
2015-08-27  5:57 ` [DMC_REDESIGN_V2 00/14] Redesign dmc firmware loading Animesh Manna

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