From: "Suzuki K. Poulose" <suzuki.poulose@arm.com> To: linux-arm-kernel@lists.infradead.org Cc: Catalin.Marinas@arm.com, Will.Deacon@arm.com, Mark.Rutland@arm.com, edward.nevill@linaro.org, aph@redhat.com, linux-kernel@vger.kernel.org, andre.przywara@arm.com, ard.biesheuvel@linaro.org, dave.martin@arm.com, marc.zyngier@arm.com, Steve Capper <steve.capper@linaro.org> Subject: [PATCH 21/22] arm64: cpuinfo: Expose MIDR_EL1 and REVIDR_EL1 to sysfs Date: Wed, 16 Sep 2015 15:21:19 +0100 [thread overview] Message-ID: <1442413280-31885-22-git-send-email-suzuki.poulose@arm.com> (raw) In-Reply-To: <1442413280-31885-1-git-send-email-suzuki.poulose@arm.com> From: Steve Capper <steve.capper@linaro.org> It can be useful for JIT software to be aware of MIDR_EL1 and REVIDR_EL1 to ascertain the presence of any core errata that could affect codegen. This patch exposes these registers through sysfs: /sys/devices/system/cpu/cpu$ID/identification/midr /sys/devices/system/cpu/cpu$ID/identification/revidr where $ID is the cpu number. For big.LITTLE systems, one can have a mixture of cores (e.g. Cortex A53 and Cortex A57), thus all CPUs need to be enumerated. If the kernel does not have valid information to populate these entries with, an empty string is returned to userspace. Signed-off-by: Steve Capper <steve.capper@linaro.org> --- arch/arm64/include/asm/cpu.h | 1 + arch/arm64/kernel/cpuinfo.c | 48 ++++++++++++++++++++++++++++++++++++++++++ 2 files changed, 49 insertions(+) diff --git a/arch/arm64/include/asm/cpu.h b/arch/arm64/include/asm/cpu.h index 8e797b2..f3649f9 100644 --- a/arch/arm64/include/asm/cpu.h +++ b/arch/arm64/include/asm/cpu.h @@ -29,6 +29,7 @@ struct cpuinfo_arm64 { u32 reg_cntfrq; u32 reg_dczid; u32 reg_midr; + u32 reg_revidr; u64 reg_id_aa64dfr0; u64 reg_id_aa64dfr1; diff --git a/arch/arm64/kernel/cpuinfo.c b/arch/arm64/kernel/cpuinfo.c index 52331ff..93e0488 100644 --- a/arch/arm64/kernel/cpuinfo.c +++ b/arch/arm64/kernel/cpuinfo.c @@ -199,6 +199,7 @@ static void __cpuinfo_store_cpu(struct cpuinfo_arm64 *info) info->reg_ctr = read_cpuid_cachetype(); info->reg_dczid = read_cpuid(DCZID_EL0); info->reg_midr = read_cpuid_id(); + info->reg_revidr = read_cpuid(REVIDR_EL1); info->reg_id_aa64dfr0 = read_cpuid(ID_AA64DFR0_EL1); info->reg_id_aa64dfr1 = read_cpuid(ID_AA64DFR1_EL1); @@ -247,3 +248,50 @@ void __init cpuinfo_store_boot_cpu(void) boot_cpu_data = *info; init_cpu_features(&boot_cpu_data); } + +#define CPUINFO_ATTR_RO(_name) \ + static ssize_t show_##_name (struct device *dev, \ + struct device_attribute *attr, char *buf) \ + { \ + struct cpuinfo_arm64 *info = &per_cpu(cpu_data, dev->id); \ + \ + if (info->reg_midr) \ + return sprintf(buf, "0x%016x\n", info->reg_##_name); \ + else \ + return 0; \ + } \ + static DEVICE_ATTR(_name, 0444, show_##_name, NULL) + +CPUINFO_ATTR_RO(midr); +CPUINFO_ATTR_RO(revidr); + +static struct attribute *cpuregs_attrs[] = { + &dev_attr_midr.attr, + &dev_attr_revidr.attr, + NULL +}; + +static struct attribute_group cpuregs_attr_group = { + .attrs = cpuregs_attrs, + .name = "identification" +}; + +static int __init cpuinfo_regs_init(void) +{ + int cpu, ret; + + for_each_present_cpu(cpu) { + struct device *dev = get_cpu_device(cpu); + + if (!dev) + return -1; + + ret = sysfs_create_group(&dev->kobj, &cpuregs_attr_group); + if (ret) + return ret; + } + + return 0; +} + +device_initcall(cpuinfo_regs_init); -- 1.7.9.5
WARNING: multiple messages have this Message-ID (diff)
From: suzuki.poulose@arm.com (Suzuki K. Poulose) To: linux-arm-kernel@lists.infradead.org Subject: [PATCH 21/22] arm64: cpuinfo: Expose MIDR_EL1 and REVIDR_EL1 to sysfs Date: Wed, 16 Sep 2015 15:21:19 +0100 [thread overview] Message-ID: <1442413280-31885-22-git-send-email-suzuki.poulose@arm.com> (raw) In-Reply-To: <1442413280-31885-1-git-send-email-suzuki.poulose@arm.com> From: Steve Capper <steve.capper@linaro.org> It can be useful for JIT software to be aware of MIDR_EL1 and REVIDR_EL1 to ascertain the presence of any core errata that could affect codegen. This patch exposes these registers through sysfs: /sys/devices/system/cpu/cpu$ID/identification/midr /sys/devices/system/cpu/cpu$ID/identification/revidr where $ID is the cpu number. For big.LITTLE systems, one can have a mixture of cores (e.g. Cortex A53 and Cortex A57), thus all CPUs need to be enumerated. If the kernel does not have valid information to populate these entries with, an empty string is returned to userspace. Signed-off-by: Steve Capper <steve.capper@linaro.org> --- arch/arm64/include/asm/cpu.h | 1 + arch/arm64/kernel/cpuinfo.c | 48 ++++++++++++++++++++++++++++++++++++++++++ 2 files changed, 49 insertions(+) diff --git a/arch/arm64/include/asm/cpu.h b/arch/arm64/include/asm/cpu.h index 8e797b2..f3649f9 100644 --- a/arch/arm64/include/asm/cpu.h +++ b/arch/arm64/include/asm/cpu.h @@ -29,6 +29,7 @@ struct cpuinfo_arm64 { u32 reg_cntfrq; u32 reg_dczid; u32 reg_midr; + u32 reg_revidr; u64 reg_id_aa64dfr0; u64 reg_id_aa64dfr1; diff --git a/arch/arm64/kernel/cpuinfo.c b/arch/arm64/kernel/cpuinfo.c index 52331ff..93e0488 100644 --- a/arch/arm64/kernel/cpuinfo.c +++ b/arch/arm64/kernel/cpuinfo.c @@ -199,6 +199,7 @@ static void __cpuinfo_store_cpu(struct cpuinfo_arm64 *info) info->reg_ctr = read_cpuid_cachetype(); info->reg_dczid = read_cpuid(DCZID_EL0); info->reg_midr = read_cpuid_id(); + info->reg_revidr = read_cpuid(REVIDR_EL1); info->reg_id_aa64dfr0 = read_cpuid(ID_AA64DFR0_EL1); info->reg_id_aa64dfr1 = read_cpuid(ID_AA64DFR1_EL1); @@ -247,3 +248,50 @@ void __init cpuinfo_store_boot_cpu(void) boot_cpu_data = *info; init_cpu_features(&boot_cpu_data); } + +#define CPUINFO_ATTR_RO(_name) \ + static ssize_t show_##_name (struct device *dev, \ + struct device_attribute *attr, char *buf) \ + { \ + struct cpuinfo_arm64 *info = &per_cpu(cpu_data, dev->id); \ + \ + if (info->reg_midr) \ + return sprintf(buf, "0x%016x\n", info->reg_##_name); \ + else \ + return 0; \ + } \ + static DEVICE_ATTR(_name, 0444, show_##_name, NULL) + +CPUINFO_ATTR_RO(midr); +CPUINFO_ATTR_RO(revidr); + +static struct attribute *cpuregs_attrs[] = { + &dev_attr_midr.attr, + &dev_attr_revidr.attr, + NULL +}; + +static struct attribute_group cpuregs_attr_group = { + .attrs = cpuregs_attrs, + .name = "identification" +}; + +static int __init cpuinfo_regs_init(void) +{ + int cpu, ret; + + for_each_present_cpu(cpu) { + struct device *dev = get_cpu_device(cpu); + + if (!dev) + return -1; + + ret = sysfs_create_group(&dev->kobj, &cpuregs_attr_group); + if (ret) + return ret; + } + + return 0; +} + +device_initcall(cpuinfo_regs_init); -- 1.7.9.5
next prev parent reply other threads:[~2015-09-16 14:23 UTC|newest] Thread overview: 70+ messages / expand[flat|nested] mbox.gz Atom feed top 2015-09-16 14:20 [PATCH 00/22] arm64: Consolidate CPU feature handling Suzuki K. Poulose 2015-09-16 14:20 ` Suzuki K. Poulose 2015-09-16 14:20 ` [PATCH 01/22] arm64: Make the CPU information more clear Suzuki K. Poulose 2015-09-16 14:20 ` Suzuki K. Poulose 2015-09-16 14:21 ` [PATCH 02/22] arm64: Delay ELF HWCAP initialisation until all CPUs are up Suzuki K. Poulose 2015-09-16 14:21 ` Suzuki K. Poulose 2015-09-16 14:21 ` [PATCH 03/22] arm64: Move cpu feature detection code Suzuki K. Poulose 2015-09-16 14:21 ` Suzuki K. Poulose 2015-09-16 14:21 ` [PATCH 04/22] arm64: Move mixed endian support detection Suzuki K. Poulose 2015-09-16 14:21 ` Suzuki K. Poulose 2015-09-16 14:21 ` [PATCH 05/22] arm64: Move /proc/cpuinfo handling code Suzuki K. Poulose 2015-09-16 14:21 ` Suzuki K. Poulose 2015-09-16 14:21 ` [PATCH 06/22] arm64: sys_reg: Define System register encoding Suzuki K. Poulose 2015-09-16 14:21 ` Suzuki K. Poulose 2015-09-16 14:21 ` [PATCH 07/22] arm64: Keep track of CPU feature registers Suzuki K. Poulose 2015-09-16 14:21 ` Suzuki K. Poulose 2015-09-25 11:38 ` Dave Martin 2015-09-25 11:38 ` Dave Martin 2015-09-25 13:05 ` Suzuki K. Poulose 2015-09-25 13:05 ` Suzuki K. Poulose 2015-09-16 14:21 ` [PATCH 08/22] arm64: Consolidate CPU Sanity check to CPU Feature infrastructure Suzuki K. Poulose 2015-09-16 14:21 ` Suzuki K. Poulose 2015-09-16 14:21 ` [PATCH 09/22] arm64: Read system wide CPUID value Suzuki K. Poulose 2015-09-16 14:21 ` Suzuki K. Poulose 2015-09-16 14:21 ` [PATCH 10/22] arm64: Cleanup mixed endian support detection Suzuki K. Poulose 2015-09-16 14:21 ` Suzuki K. Poulose 2015-09-16 14:21 ` [PATCH 11/22] arm64: Populate cpuinfo after notify_cpu_starting Suzuki K. Poulose 2015-09-16 14:21 ` Suzuki K. Poulose 2015-09-16 14:21 ` [PATCH 12/22] arm64: Delay cpu feature checks Suzuki K. Poulose 2015-09-16 14:21 ` Suzuki K. Poulose 2015-09-16 14:21 ` [PATCH 13/22] arm64: Make use of system wide capability checks Suzuki K. Poulose 2015-09-16 14:21 ` Suzuki K. Poulose 2015-09-16 14:21 ` [PATCH 14/22] arm64: Cleanup HWCAP handling Suzuki K. Poulose 2015-09-16 14:21 ` Suzuki K. Poulose 2015-09-16 14:21 ` [PATCH 15/22] arm64: Move FP/ASIMD hwcap handling to common code Suzuki K. Poulose 2015-09-16 14:21 ` Suzuki K. Poulose 2015-09-16 14:21 ` [PATCH 16/22] arm64/debug: Make use of the system wide safe value Suzuki K. Poulose 2015-09-16 14:21 ` Suzuki K. Poulose 2015-09-29 12:17 ` Vladimir Murzin 2015-09-29 12:17 ` Vladimir Murzin 2015-09-29 12:46 ` Suzuki K. Poulose 2015-09-29 12:46 ` Suzuki K. Poulose 2015-09-30 16:13 ` Suzuki K. Poulose 2015-09-30 16:13 ` Suzuki K. Poulose 2015-09-16 14:21 ` [PATCH 17/22] arm64/kvm: Make use of the system wide safe values Suzuki K. Poulose 2015-09-16 14:21 ` Suzuki K. Poulose 2015-09-16 14:21 ` [PATCH 18/22] arm64: Add helper to decode register from instruction Suzuki K. Poulose 2015-09-16 14:21 ` Suzuki K. Poulose 2015-09-16 14:21 ` [PATCH 19/22] arm64: cpufeature: Track the user visible fields Suzuki K. Poulose 2015-09-16 14:21 ` Suzuki K. Poulose 2015-09-16 14:21 ` [PATCH 20/22] arm64: Expose feature registers by emulating MRS Suzuki K. Poulose 2015-09-16 14:21 ` Suzuki K. Poulose 2015-09-16 14:21 ` Suzuki K. Poulose [this message] 2015-09-16 14:21 ` [PATCH 21/22] arm64: cpuinfo: Expose MIDR_EL1 and REVIDR_EL1 to sysfs Suzuki K. Poulose 2015-09-16 14:21 ` [PATCH 22/22] arm64: feature registers: Documentation Suzuki K. Poulose 2015-09-16 14:21 ` Suzuki K. Poulose 2015-09-18 9:23 ` [PATCH 00/22] arm64: Consolidate CPU feature handling Suzuki K. Poulose 2015-09-18 9:23 ` Suzuki K. Poulose 2015-09-22 15:19 ` James Morse 2015-09-22 15:19 ` James Morse 2015-09-22 15:21 ` Suzuki K. Poulose 2015-09-22 15:21 ` Suzuki K. Poulose 2015-09-23 15:56 ` Dave Martin 2015-09-23 15:56 ` Dave Martin 2015-09-23 15:58 ` Suzuki K. Poulose 2015-09-23 15:58 ` Suzuki K. Poulose 2015-09-23 16:37 ` Suzuki K. Poulose 2015-09-23 16:37 ` Suzuki K. Poulose 2015-09-23 17:08 ` Dave P Martin 2015-09-23 17:08 ` Dave P Martin
Reply instructions: You may reply publicly to this message via plain-text email using any one of the following methods: * Save the following mbox file, import it into your mail client, and reply-to-all from there: mbox Avoid top-posting and favor interleaved quoting: https://en.wikipedia.org/wiki/Posting_style#Interleaved_style * Reply using the --to, --cc, and --in-reply-to switches of git-send-email(1): git send-email \ --in-reply-to=1442413280-31885-22-git-send-email-suzuki.poulose@arm.com \ --to=suzuki.poulose@arm.com \ --cc=Catalin.Marinas@arm.com \ --cc=Mark.Rutland@arm.com \ --cc=Will.Deacon@arm.com \ --cc=andre.przywara@arm.com \ --cc=aph@redhat.com \ --cc=ard.biesheuvel@linaro.org \ --cc=dave.martin@arm.com \ --cc=edward.nevill@linaro.org \ --cc=linux-arm-kernel@lists.infradead.org \ --cc=linux-kernel@vger.kernel.org \ --cc=marc.zyngier@arm.com \ --cc=steve.capper@linaro.org \ /path/to/YOUR_REPLY https://kernel.org/pub/software/scm/git/docs/git-send-email.html * If your mail client supports setting the In-Reply-To header via mailto: links, try the mailto: linkBe sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes, see mirroring instructions on how to clone and mirror all data and code used by this external index.