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From: Robert Bragg <robert@sixbynine.org>
To: intel-gfx@lists.freedesktop.org
Cc: Daniel Vetter <daniel.vetter@intel.com>,
	Chris Wilson <chris@chris-wilson.co.uk>,
	Sourab Gupta <sourab.gupta@intel.com>,
	Zhenyu Wang <zhenyuw@linux.intel.com>,
	Jani Nikula <jani.nikula@linux.intel.com>,
	David Airlie <airlied@linux.ie>,
	Peter Zijlstra <peterz@infradead.org>,
	Ingo Molnar <mingo@kernel.org>, Kan Liang <kan.liang@intel.com>,
	Alexander Shishkin <alexander.shishkin@linux.intel.com>,
	Zheng Yan <zheng.z.yan@intel.com>,
	Mark Rutland <mark.rutland@arm.com>,
	Matt Fleming <matt.fleming@intel.com>,
	dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org,
	linux-api@vger.kernel.org
Subject: [RFC 2/6] drm/i915: rename OACONTROL GEN7_OACONTROL
Date: Tue, 29 Sep 2015 15:39:05 +0100	[thread overview]
Message-ID: <1443537549-6905-3-git-send-email-robert@sixbynine.org> (raw)
In-Reply-To: <1443537549-6905-1-git-send-email-robert@sixbynine.org>

OACONTROL changes quite a bit for gen8, with some bits split out into a
per-context OACTXCONTROL register

Signed-off-by: Robert Bragg <robert@sixbynine.org>
---
 drivers/gpu/drm/i915/i915_cmd_parser.c | 4 ++--
 drivers/gpu/drm/i915/i915_reg.h        | 2 +-
 2 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_cmd_parser.c b/drivers/gpu/drm/i915/i915_cmd_parser.c
index 237ff68..d769436 100644
--- a/drivers/gpu/drm/i915/i915_cmd_parser.c
+++ b/drivers/gpu/drm/i915/i915_cmd_parser.c
@@ -439,7 +439,7 @@ static const struct drm_i915_reg_descriptor gen7_render_regs[] = {
 	REG64(CL_PRIMITIVES_COUNT),
 	REG64(PS_INVOCATION_COUNT),
 	REG64(PS_DEPTH_COUNT),
-	REG32(OACONTROL), /* Only allowed for LRI and SRM. See below. */
+	REG32(GEN7_OACONTROL), /* Only allowed for LRI and SRM. See below. */
 	REG64(MI_PREDICATE_SRC0),
 	REG64(MI_PREDICATE_SRC1),
 	REG32(GEN7_3DPRIM_END_OFFSET),
@@ -1020,7 +1020,7 @@ static bool check_cmd(const struct intel_engine_cs *ring,
 			 * to the register. Hence, limit OACONTROL writes to
 			 * only MI_LOAD_REGISTER_IMM commands.
 			 */
-			if (reg_addr == OACONTROL) {
+			if (reg_addr == GEN7_OACONTROL) {
 				if (desc->cmd.value == MI_LOAD_REGISTER_MEM(1)) {
 					DRM_DEBUG_DRIVER("CMD: Rejected LRM to OACONTROL\n");
 					return false;
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 1fa0554..2e488e8 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -536,7 +536,7 @@
 #define GEN7_3DPRIM_START_INSTANCE      0x243C
 #define GEN7_3DPRIM_BASE_VERTEX         0x2440
 
-#define OACONTROL 0x2360
+#define GEN7_OACONTROL 0x2360
 
 #define _GEN7_PIPEA_DE_LOAD_SL	0x70068
 #define _GEN7_PIPEB_DE_LOAD_SL	0x71068
-- 
2.5.2


WARNING: multiple messages have this Message-ID (diff)
From: Robert Bragg <robert@sixbynine.org>
To: intel-gfx@lists.freedesktop.org
Cc: Mark Rutland <mark.rutland@arm.com>,
	Matt Fleming <matt.fleming@intel.com>,
	David Airlie <airlied@linux.ie>,
	dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org,
	Peter Zijlstra <peterz@infradead.org>,
	Sourab Gupta <sourab.gupta@intel.com>,
	linux-api@vger.kernel.org, Zheng Yan <zheng.z.yan@intel.com>,
	Daniel Vetter <daniel.vetter@intel.com>,
	Ingo Molnar <mingo@kernel.org>,
	Alexander Shishkin <alexander.shishkin@linux.intel.com>
Subject: [RFC 2/6] drm/i915: rename OACONTROL GEN7_OACONTROL
Date: Tue, 29 Sep 2015 15:39:05 +0100	[thread overview]
Message-ID: <1443537549-6905-3-git-send-email-robert@sixbynine.org> (raw)
In-Reply-To: <1443537549-6905-1-git-send-email-robert@sixbynine.org>

OACONTROL changes quite a bit for gen8, with some bits split out into a
per-context OACTXCONTROL register

Signed-off-by: Robert Bragg <robert@sixbynine.org>
---
 drivers/gpu/drm/i915/i915_cmd_parser.c | 4 ++--
 drivers/gpu/drm/i915/i915_reg.h        | 2 +-
 2 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_cmd_parser.c b/drivers/gpu/drm/i915/i915_cmd_parser.c
index 237ff68..d769436 100644
--- a/drivers/gpu/drm/i915/i915_cmd_parser.c
+++ b/drivers/gpu/drm/i915/i915_cmd_parser.c
@@ -439,7 +439,7 @@ static const struct drm_i915_reg_descriptor gen7_render_regs[] = {
 	REG64(CL_PRIMITIVES_COUNT),
 	REG64(PS_INVOCATION_COUNT),
 	REG64(PS_DEPTH_COUNT),
-	REG32(OACONTROL), /* Only allowed for LRI and SRM. See below. */
+	REG32(GEN7_OACONTROL), /* Only allowed for LRI and SRM. See below. */
 	REG64(MI_PREDICATE_SRC0),
 	REG64(MI_PREDICATE_SRC1),
 	REG32(GEN7_3DPRIM_END_OFFSET),
@@ -1020,7 +1020,7 @@ static bool check_cmd(const struct intel_engine_cs *ring,
 			 * to the register. Hence, limit OACONTROL writes to
 			 * only MI_LOAD_REGISTER_IMM commands.
 			 */
-			if (reg_addr == OACONTROL) {
+			if (reg_addr == GEN7_OACONTROL) {
 				if (desc->cmd.value == MI_LOAD_REGISTER_MEM(1)) {
 					DRM_DEBUG_DRIVER("CMD: Rejected LRM to OACONTROL\n");
 					return false;
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 1fa0554..2e488e8 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -536,7 +536,7 @@
 #define GEN7_3DPRIM_START_INSTANCE      0x243C
 #define GEN7_3DPRIM_BASE_VERTEX         0x2440
 
-#define OACONTROL 0x2360
+#define GEN7_OACONTROL 0x2360
 
 #define _GEN7_PIPEA_DE_LOAD_SL	0x70068
 #define _GEN7_PIPEB_DE_LOAD_SL	0x71068
-- 
2.5.2

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx

  parent reply	other threads:[~2015-09-29 14:40 UTC|newest]

Thread overview: 35+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-09-29 14:39 [RFC 0/6] Non perf based Gen Graphics OA unit driver Robert Bragg
2015-09-29 14:39 ` Robert Bragg
2015-09-29 14:39 ` [RFC 1/6] drm/i915: Add i915 perf infrastructure Robert Bragg
2015-09-29 14:39   ` Robert Bragg
2015-09-29 14:39 ` Robert Bragg [this message]
2015-09-29 14:39   ` [RFC 2/6] drm/i915: rename OACONTROL GEN7_OACONTROL Robert Bragg
2015-09-29 14:39 ` [RFC 3/6] drm/i915: Add static '3D' Haswell OA unit config Robert Bragg
2015-09-29 14:39   ` Robert Bragg
2015-09-29 14:39 ` [RFC 4/6] drm/i915: Add i915 perf event for Haswell OA unit Robert Bragg
2015-09-29 14:39   ` Robert Bragg
2015-09-29 14:55   ` [Intel-gfx] " kbuild test robot
2015-09-29 14:55     ` kbuild test robot
2015-09-29 15:18     ` Peter Zijlstra
2015-09-29 15:18       ` Peter Zijlstra
2015-09-29 23:19       ` [kbuild-all] " Fengguang Wu
2015-09-29 23:19         ` [kbuild-all] " Fengguang Wu
2015-09-29 14:39 ` [RFC 5/6] drm/i915: Add dev.i915.perf_event_paranoid sysctl option Robert Bragg
2015-09-29 14:39   ` Robert Bragg
2015-09-29 14:39 ` [RFC 6/6] drm/i915: add oa_event_min_timer_exponent sysctl Robert Bragg
2015-09-29 14:39   ` Robert Bragg
2015-09-30  3:23 ` [RFC 0/6] Non perf based Gen Graphics OA unit driver Zhenyu Wang
2015-09-30  3:23   ` Zhenyu Wang
2015-09-30  8:30 ` Chris Wilson
2015-09-30  8:30   ` Chris Wilson
2015-09-30 13:36   ` Robert Bragg
2015-10-16  9:43 ` Peter Zijlstra
2015-10-16  9:43   ` Peter Zijlstra
2015-10-16 10:02   ` Ingo Molnar
2015-10-16 10:02     ` Ingo Molnar
2015-10-16 10:33     ` Peter Zijlstra
2015-10-16 10:33       ` Peter Zijlstra
2015-10-16 12:08       ` Robert Bragg
2015-10-16 12:08         ` Robert Bragg
2015-10-20 20:16   ` Robert Bragg
2015-10-20 20:16     ` Robert Bragg

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