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From: Gaurav K Singh <gaurav.k.singh@intel.com>
To: intel-gfx <intel-gfx@lists.freedesktop.org>
Cc: m.deepak@intel.com, suryanarayana.r.sangani@intel.com,
	rakshmi.bhatia@intel.com
Subject: [PATCH 06/14] drm/i915: Disable vlank interrupt for disabling MIPI
Date: Wed, 30 Sep 2015 03:24:03 +0530	[thread overview]
Message-ID: <1443563651-11596-7-git-send-email-gaurav.k.singh@intel.com> (raw)
In-Reply-To: <1443563651-11596-1-git-send-email-gaurav.k.singh@intel.com>

vblank interrupt should be disabled before starting the disable
sequence for MIPI command mode. Otherwise when pipe is disabled
TE interurpt will be still handled and one memory write command
will be sent with pipe disabled. This makes the pipe hw to get
stuck and it doesn't recover in the next enable sequence causing
display blank out.

v2: Use drm_blank_off instead of platform specific disable vblank functions (Daniel)

Signed-off-by: Yogesh Mohan Marimuthu <yogesh.mohan.marimuthu@intel.com>
Signed-off-by: Gaurav K Singh <gaurav.k.singh@intel.com>
---
 drivers/gpu/drm/i915/intel_dsi.c |   15 +++++++++++++++
 1 file changed, 15 insertions(+)

diff --git a/drivers/gpu/drm/i915/intel_dsi.c b/drivers/gpu/drm/i915/intel_dsi.c
index 41f988c..d2b5d49 100644
--- a/drivers/gpu/drm/i915/intel_dsi.c
+++ b/drivers/gpu/drm/i915/intel_dsi.c
@@ -568,13 +568,28 @@ static void intel_dsi_enable_nop(struct intel_encoder *encoder)
 
 static void intel_dsi_pre_disable(struct intel_encoder *encoder)
 {
+	struct drm_device *dev = encoder->base.dev;
 	struct intel_dsi *intel_dsi = enc_to_intel_dsi(&encoder->base);
+	struct intel_crtc *intel_crtc = to_intel_crtc(encoder->base.crtc);
+	int pipe = intel_crtc->pipe;
+
 	enum port port;
 
 	DRM_DEBUG_KMS("\n");
 
 	intel_panel_disable_backlight(intel_dsi->attached_connector);
 
+	if (is_cmd_mode(intel_dsi)) {
+		drm_vblank_off(dev, pipe);
+
+		/*
+		 * Make sure that the last frame is sent otherwise pipe can get
+		 * stuck. Currently providing delay time for ~2 vblanks
+		 * assuming 60fps.
+		 */
+		mdelay(40);
+	}
+
 	if (is_vid_mode(intel_dsi)) {
 		/* Send Shutdown command to the panel in LP mode */
 		for_each_dsi_port(port, intel_dsi->ports)
-- 
1.7.9.5

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  parent reply	other threads:[~2015-09-29 21:58 UTC|newest]

Thread overview: 16+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-09-29 21:53 [PATCH 00/14] DSI Command mode(DBI mode) enabling on CHT Gaurav K Singh
2015-09-29 21:53 ` [PATCH 01/14] drm/i915: allocate DMA region for mipi dbi cmd buffer Gaurav K Singh
2015-09-29 21:53 ` [PATCH 02/14] drm/i915: Add support for TEAR ON Sequence Gaurav K Singh
2015-09-29 21:54 ` [PATCH 03/14] drm/i915: Add functions for dcs memory write cmd Gaurav K Singh
2015-10-05 12:45   ` Jani Nikula
2015-09-29 21:54 ` [PATCH 04/14] drm/i915: Calculate bw timer for mipi DBI interface Gaurav K Singh
2015-09-29 21:54 ` [PATCH 05/14] drm/i915: Use the bpp value wrt the pixel format Gaurav K Singh
2015-09-29 21:54 ` Gaurav K Singh [this message]
2015-09-29 21:54 ` [PATCH 07/14] drm/i915: Disable MIPI display self refresh mode Gaurav K Singh
2015-09-29 21:54 ` [PATCH 08/14] drm/i915: Disable Tearing effect trigger by GPIO pin Gaurav K Singh
2015-09-29 21:54 ` [PATCH 09/14] drm/i915: Changes for command mode preparation Gaurav K Singh
2015-09-29 21:54 ` [PATCH 10/14] drm/i915: Enable Tearing effect trigger by GPIO pin Gaurav K Singh
2015-09-29 21:54 ` [PATCH 11/14] drm/i915: Enable MIPI display self refresh mode Gaurav K Singh
2015-09-29 21:54 ` [PATCH 12/14] drm/i915: Generalize DSI enable function Gaurav K Singh
2015-09-29 21:54 ` [PATCH 13/14] drm/i915: Reset the display hw if vid mode to cmd mode Gaurav K Singh
2015-09-29 21:54 ` [PATCH 14/14] drm/i915: send one frame after enabling mipi " Gaurav K Singh

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