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From: Imre Deak <imre.deak@intel.com>
To: intel-gfx@lists.freedesktop.org
Cc: Ben Widawsky <benjamin.widawsky@intel.com>
Subject: [PATCH 2/5] drm/i915: rename INSTDONE to GEN2_INSTDONE
Date: Wed, 30 Sep 2015 23:00:43 +0300	[thread overview]
Message-ID: <1443643246-7832-3-git-send-email-imre.deak@intel.com> (raw)
In-Reply-To: <1443643246-7832-1-git-send-email-imre.deak@intel.com>

We have a bunch of INSTDONE registers for different platforms and
purposes and it's not immediately clear which instance they are just by
looking at the register name. This one was added on GEN2, where it was
the only INSTDONE register, so mark it as such.

Signed-off-by: Imre Deak <imre.deak@intel.com>
---
 drivers/gpu/drm/i915/i915_gpu_error.c | 4 ++--
 drivers/gpu/drm/i915/i915_reg.h       | 3 ++-
 2 files changed, 4 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_gpu_error.c b/drivers/gpu/drm/i915/i915_gpu_error.c
index 27423ed..85d9a39 100644
--- a/drivers/gpu/drm/i915/i915_gpu_error.c
+++ b/drivers/gpu/drm/i915/i915_gpu_error.c
@@ -886,7 +886,7 @@ static void i915_record_ring_state(struct drm_device *dev,
 		ering->faddr = I915_READ(DMA_FADD_I8XX);
 		ering->ipeir = I915_READ(IPEIR);
 		ering->ipehr = I915_READ(IPEHR);
-		ering->instdone = I915_READ(INSTDONE);
+		ering->instdone = I915_READ(GEN2_INSTDONE);
 	}
 
 	ering->waiting = waitqueue_active(&ring->irq_queue);
@@ -1388,7 +1388,7 @@ void i915_get_extra_instdone(struct drm_device *dev, uint32_t *instdone)
 	memset(instdone, 0, sizeof(*instdone) * I915_NUM_INSTDONE_REG);
 
 	if (IS_GEN2(dev) || IS_GEN3(dev))
-		instdone[0] = I915_READ(INSTDONE);
+		instdone[0] = I915_READ(GEN2_INSTDONE);
 	else if (IS_GEN4(dev) || IS_GEN5(dev) || IS_GEN6(dev)) {
 		instdone[0] = I915_READ(RING_INSTDONE(RENDER_RING_BASE));
 		instdone[1] = I915_READ(INSTDONE1);
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index d27894c..6e3d816 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -1602,6 +1602,7 @@ enum skl_disp_power_wells {
 /*
  * On GEN4, only the render ring INSTDONE exists and has a different
  * layout than the GEN7+ version.
+ * The GEN2 counterpart of this register is GEN2_INSTDONE.
  */
 #define RING_INSTDONE(base)	((base)+0x6c)
 #define RING_INSTPS(base)	((base)+0x70)
@@ -1619,7 +1620,7 @@ enum skl_disp_power_wells {
 #define   PWRCTX_EN	(1<<0)
 #define IPEIR		0x02088
 #define IPEHR		0x0208c
-#define INSTDONE	0x02090
+#define GEN2_INSTDONE	0x02090
 #define NOPID		0x02094
 #define HWSTAM		0x02098
 #define DMA_FADD_I8XX	0x020d0
-- 
2.1.4

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  parent reply	other threads:[~2015-09-30 20:00 UTC|newest]

Thread overview: 13+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-09-30 20:00 [PATCH 0/5] drm/i915: per slice/subslice INSTDONE capturing Imre Deak
2015-09-30 20:00 ` [PATCH 1/5] drm/i915: remove duplicate names for the render ring INSTDONE register Imre Deak
2015-09-30 20:00 ` Imre Deak [this message]
2015-09-30 20:00 ` [PATCH 3/5] drm/i915: rename INSTDONE1 to GEN4_INSTDONE1 Imre Deak
2015-10-01 22:58   ` Ben Widawsky
2015-09-30 20:00 ` [PATCH 4/5] drm/i915: Cleanup instdone collection Imre Deak
2015-09-30 20:00 ` [PATCH 5/5] drm/i915: Try to print INSTDONE bits for all slice/subslice Imre Deak
2015-10-01 23:00   ` Ben Widawsky
2015-10-02 10:58     ` Imre Deak
2015-10-02 15:52       ` Ben Widawsky
2015-10-01 23:56   ` Ben Widawsky
2015-10-02  9:44     ` Imre Deak
2015-10-02 13:03       ` Daniel Vetter

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