From: Arun Siluvery <arun.siluvery@linux.intel.com>
To: intel-gfx@lists.freedesktop.org
Cc: Mika Kuoppala <mika.kuoppala@intel.com>
Subject: [PATCH 2/2] drm/i915/gen9: Add HDC_CHICKEN1 to HW whitelist
Date: Fri, 2 Oct 2015 14:19:40 +0100 [thread overview]
Message-ID: <1443791980-34458-2-git-send-email-arun.siluvery@linux.intel.com> (raw)
In-Reply-To: <1443791980-34458-1-git-send-email-arun.siluvery@linux.intel.com>
Required for WaAllowUMDToModifyHDCChicken1:skl,bxt
Cc: Mika Kuoppala <mika.kuoppala@intel.com>
Cc: Nick Hoath <nicholas.hoath@intel.com>
Signed-off-by: Arun Siluvery <arun.siluvery@linux.intel.com>
---
drivers/gpu/drm/i915/i915_reg.h | 2 ++
drivers/gpu/drm/i915/intel_ringbuffer.c | 6 ++++++
2 files changed, 8 insertions(+)
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 797c74e..dc84072 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -5937,6 +5937,8 @@ enum skl_disp_power_wells {
#define HDC_FORCE_NON_COHERENT (1<<4)
#define HDC_BARRIER_PERFORMANCE_DISABLE (1<<10)
+#define HDC_CHICKEN1 0x7304
+
/* GEN9 chicken */
#define SLICE_ECO_CHICKEN0 0x7308
#define PIXEL_MASK_CAMMING_DISABLE (1 << 14)
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
index 64b2754..a091e9e 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.c
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
@@ -921,6 +921,7 @@ static int gen9_init_workarounds(struct intel_engine_cs *ring)
struct drm_device *dev = ring->dev;
struct drm_i915_private *dev_priv = dev->dev_private;
uint32_t tmp;
+ int ret;
/* WaDisablePartialInstShootdown:skl,bxt */
WA_SET_BIT_MASKED(GEN8_ROW_CHICKEN,
@@ -979,6 +980,11 @@ static int gen9_init_workarounds(struct intel_engine_cs *ring)
tmp |= HDC_FORCE_CSR_NON_COHERENT_OVR_DISABLE;
WA_SET_BIT_MASKED(HDC_CHICKEN0, tmp);
+ /* WaAllowUMDToModifyHDCChicken1:skl,bxt */
+ ret = wa_ring_whitelist_reg(ring, HDC_CHICKEN1);
+ if (ret)
+ return ret;
+
/* WaDisableSamplerPowerBypassForSOPingPong:skl,bxt */
if (IS_SKYLAKE(dev) ||
(IS_BROXTON(dev) && INTEL_REVID(dev) <= BXT_REVID_B0)) {
--
1.9.1
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next prev parent reply other threads:[~2015-10-02 13:19 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-10-02 13:19 [PATCH 1/2] drm/i915/gen9: Add framework to whitelist specific GPU registers Arun Siluvery
2015-10-02 13:19 ` Arun Siluvery [this message]
2015-10-06 8:46 ` [PATCH 2/2] drm/i915/gen9: Add HDC_CHICKEN1 to HW whitelist Daniel Vetter
2015-10-06 9:23 ` [PATCH 1/2] drm/i915/gen9: Add framework to whitelist specific GPU registers Mika Kuoppala
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