From: Douglas Anderson <dianders@chromium.org> To: John Youn <John.Youn@synopsys.com> Cc: "Yunzhi Li" <lyz@rock-chips.com>, "Heiko Stübner" <heiko@sntech.de>, linux-rockchip@lists.infradead.org, "Julius Werner" <jwerner@chromium.org>, "Douglas Anderson" <dianders@chromium.org>, johnyoun@synopsys.com, gregkh@linuxfoundation.org, linux-usb@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 4/5] usb: dwc2: Speed dwc2_get_hwparams() on some host-only ports Date: Wed, 7 Oct 2015 17:48:40 -0700 [thread overview] Message-ID: <1444265321-16768-5-git-send-email-dianders@chromium.org> (raw) In-Reply-To: <1444265321-16768-1-git-send-email-dianders@chromium.org> On some host-only DWC2 ports (like the one in rk3288) when we set GUSBCFG_FORCEHOSTMODE in GUSBCFG and then read back, we don't see the bit set. Presumably that's because the port is always forced to HOST mode so there's no reason to implement these status bits. Since we know dwc2_core_reset() is always called before dwc2_get_hwparams() and we know dwc2_core_reset() should have set GUSBCFG_FORCEHOSTMODE whenever hsotg->dr_mode == USB_DR_MODE_HOST, we can just check hsotg->dr_mode to decide that we can skip the delays in dwc2_get_hwparams(). Signed-off-by: Douglas Anderson <dianders@chromium.org> --- drivers/usb/dwc2/core.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/drivers/usb/dwc2/core.c b/drivers/usb/dwc2/core.c index 9f1c438..27ade0c 100644 --- a/drivers/usb/dwc2/core.c +++ b/drivers/usb/dwc2/core.c @@ -3070,7 +3070,7 @@ int dwc2_get_hwparams(struct dwc2_hsotg *hsotg) unsigned width; u32 hwcfg1, hwcfg2, hwcfg3, hwcfg4; u32 hptxfsiz, grxfsiz, gnptxfsiz; - u32 gusbcfg; + u32 gusbcfg = 0; /* * Attempt to ensure this device is really a DWC_otg Controller. @@ -3103,8 +3103,8 @@ int dwc2_get_hwparams(struct dwc2_hsotg *hsotg) dev_dbg(hsotg->dev, "grxfsiz=%08x\n", grxfsiz); /* Force host mode to get HPTXFSIZ / GNPTXFSIZ exact power on value */ - gusbcfg = dwc2_readl(hsotg->regs + GUSBCFG); - if (!(gusbcfg & GUSBCFG_FORCEHOSTMODE)) { + if (hsotg->dr_mode != USB_DR_MODE_HOST) { + gusbcfg = dwc2_readl(hsotg->regs + GUSBCFG); dwc2_writel(gusbcfg | GUSBCFG_FORCEHOSTMODE, hsotg->regs + GUSBCFG); usleep_range(100000, 150000); @@ -3114,7 +3114,7 @@ int dwc2_get_hwparams(struct dwc2_hsotg *hsotg) hptxfsiz = dwc2_readl(hsotg->regs + HPTXFSIZ); dev_dbg(hsotg->dev, "gnptxfsiz=%08x\n", gnptxfsiz); dev_dbg(hsotg->dev, "hptxfsiz=%08x\n", hptxfsiz); - if (!(gusbcfg & GUSBCFG_FORCEHOSTMODE)) { + if (hsotg->dr_mode != USB_DR_MODE_HOST) { dwc2_writel(gusbcfg, hsotg->regs + GUSBCFG); usleep_range(100000, 150000); } -- 2.6.0.rc2.230.g3dd15c0
WARNING: multiple messages have this Message-ID (diff)
From: Douglas Anderson <dianders-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org> To: John Youn <John.Youn-HKixBCOQz3hWk0Htik3J/w@public.gmane.org> Cc: "Heiko Stübner" <heiko-4mtYJXux2i+zQB+pC5nmwQ@public.gmane.org>, johnyoun-HKixBCOQz3hWk0Htik3J/w@public.gmane.org, gregkh-hQyY1W1yCW8ekmWlsbkhG0B+6BGkLq7r@public.gmane.org, linux-usb-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, "Douglas Anderson" <dianders-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org>, linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, linux-rockchip-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org, "Yunzhi Li" <lyz-TNX95d0MmH7DzftRWevZcw@public.gmane.org>, "Julius Werner" <jwerner-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org> Subject: [PATCH 4/5] usb: dwc2: Speed dwc2_get_hwparams() on some host-only ports Date: Wed, 7 Oct 2015 17:48:40 -0700 [thread overview] Message-ID: <1444265321-16768-5-git-send-email-dianders@chromium.org> (raw) In-Reply-To: <1444265321-16768-1-git-send-email-dianders-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org> On some host-only DWC2 ports (like the one in rk3288) when we set GUSBCFG_FORCEHOSTMODE in GUSBCFG and then read back, we don't see the bit set. Presumably that's because the port is always forced to HOST mode so there's no reason to implement these status bits. Since we know dwc2_core_reset() is always called before dwc2_get_hwparams() and we know dwc2_core_reset() should have set GUSBCFG_FORCEHOSTMODE whenever hsotg->dr_mode == USB_DR_MODE_HOST, we can just check hsotg->dr_mode to decide that we can skip the delays in dwc2_get_hwparams(). Signed-off-by: Douglas Anderson <dianders-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org> --- drivers/usb/dwc2/core.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/drivers/usb/dwc2/core.c b/drivers/usb/dwc2/core.c index 9f1c438..27ade0c 100644 --- a/drivers/usb/dwc2/core.c +++ b/drivers/usb/dwc2/core.c @@ -3070,7 +3070,7 @@ int dwc2_get_hwparams(struct dwc2_hsotg *hsotg) unsigned width; u32 hwcfg1, hwcfg2, hwcfg3, hwcfg4; u32 hptxfsiz, grxfsiz, gnptxfsiz; - u32 gusbcfg; + u32 gusbcfg = 0; /* * Attempt to ensure this device is really a DWC_otg Controller. @@ -3103,8 +3103,8 @@ int dwc2_get_hwparams(struct dwc2_hsotg *hsotg) dev_dbg(hsotg->dev, "grxfsiz=%08x\n", grxfsiz); /* Force host mode to get HPTXFSIZ / GNPTXFSIZ exact power on value */ - gusbcfg = dwc2_readl(hsotg->regs + GUSBCFG); - if (!(gusbcfg & GUSBCFG_FORCEHOSTMODE)) { + if (hsotg->dr_mode != USB_DR_MODE_HOST) { + gusbcfg = dwc2_readl(hsotg->regs + GUSBCFG); dwc2_writel(gusbcfg | GUSBCFG_FORCEHOSTMODE, hsotg->regs + GUSBCFG); usleep_range(100000, 150000); @@ -3114,7 +3114,7 @@ int dwc2_get_hwparams(struct dwc2_hsotg *hsotg) hptxfsiz = dwc2_readl(hsotg->regs + HPTXFSIZ); dev_dbg(hsotg->dev, "gnptxfsiz=%08x\n", gnptxfsiz); dev_dbg(hsotg->dev, "hptxfsiz=%08x\n", hptxfsiz); - if (!(gusbcfg & GUSBCFG_FORCEHOSTMODE)) { + if (hsotg->dr_mode != USB_DR_MODE_HOST) { dwc2_writel(gusbcfg, hsotg->regs + GUSBCFG); usleep_range(100000, 150000); } -- 2.6.0.rc2.230.g3dd15c0
next prev parent reply other threads:[~2015-10-08 0:49 UTC|newest] Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top 2015-10-08 0:48 [PATCH 0/5] usb: dwc2: fix dwc2_get_hwparams() + optimize probe time a bit Douglas Anderson 2015-10-08 0:48 ` Douglas Anderson 2015-10-08 0:48 ` [PATCH 1/5] usb: dwc2: Restore GUSBCFG in dwc2_get_hwparams() Douglas Anderson 2015-10-08 0:48 ` Douglas Anderson 2015-10-08 0:48 ` [PATCH 2/5] usb: dwc2: reset dwc2 core before dwc2_get_hwparams() Douglas Anderson 2015-10-08 0:48 ` Douglas Anderson 2015-10-08 0:48 ` [PATCH 3/5] CHROMIUM: usb: dwc2: Avoid double-reset at boot time Douglas Anderson 2015-10-08 0:48 ` Douglas Anderson 2015-10-08 17:34 ` Doug Anderson 2015-10-08 17:34 ` Doug Anderson 2015-10-08 0:48 ` Douglas Anderson [this message] 2015-10-08 0:48 ` [PATCH 4/5] usb: dwc2: Speed dwc2_get_hwparams() on some host-only ports Douglas Anderson 2015-10-08 0:48 ` [PATCH 5/5] usb: dwc2: reduce dwc2 driver probe time Douglas Anderson 2015-10-08 0:48 ` Douglas Anderson
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