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From: Tomeu Vizoso <tomeu.vizoso@collabora.com>
To: linux-kernel@vger.kernel.org
Cc: Gustavo Padovan <gustavo.padovan@collabora.co.uk>,
	Javier Martinez Canillas <javier@osg.samsung.com>,
	Seung-Woo Kim <sw0312.kim@samsung.com>,
	Kukjin Kim <kgene@kernel.org>, Inki Dae <inki.dae@samsung.com>,
	Kyungmin Park <kyungmin.park@samsung.com>,
	Krzysztof Kozlowski <k.kozlowski@samsung.com>,
	Joonyoung Shim <jy0922.shim@samsung.com>,
	Tomeu Vizoso <tomeu.vizoso@collabora.com>,
	Russell King <linux@arm.linux.org.uk>,
	devicetree@vger.kernel.org, Kumar Gala <galak@codeaurora.org>,
	Ian Campbell <ijc+devicetree@hellion.org.uk>,
	linux-samsung-soc@vger.kernel.org,
	Rob Herring <robh+dt@kernel.org>, Pawel Moll <pawel.moll@arm.com>,
	Mark Rutland <mark.rutland@arm.com>,
	linux-arm-kernel@lists.infradead.org
Subject: [PATCH v2 2/2] ARM: dts: exynos5250: Add clocks to DISP1 domain
Date: Thu, 15 Oct 2015 12:31:24 +0200	[thread overview]
Message-ID: <1444905084-22540-3-git-send-email-tomeu.vizoso@collabora.com> (raw)
In-Reply-To: <1444905084-22540-1-git-send-email-tomeu.vizoso@collabora.com>

Adds to the node of the DISP1 power domain the two clocks that need to
be reparented while the domain is powered off:
CLK_MOUT_ACLK200_DISP1_SUB and CLK_MOUT_ACLK300_DISP1_SUB.

Otherwise the state is unknown at power up and the mixer's clocks are
all messed up.

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Link: http://lkml.kernel.org/g/561CDC33.7050103@collabora.com
---


 arch/arm/boot/dts/exynos5250.dtsi | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/arch/arm/boot/dts/exynos5250.dtsi b/arch/arm/boot/dts/exynos5250.dtsi
index b24610ea8c2a..88b9cf5f226f 100644
--- a/arch/arm/boot/dts/exynos5250.dtsi
+++ b/arch/arm/boot/dts/exynos5250.dtsi
@@ -130,6 +130,10 @@
 		compatible = "samsung,exynos4210-pd";
 		reg = <0x100440A0 0x20>;
 		#power-domain-cells = <0>;
+		clocks = <&clock CLK_FIN_PLL>,
+			 <&clock CLK_MOUT_ACLK200_DISP1_SUB>,
+			 <&clock CLK_MOUT_ACLK300_DISP1_SUB>;
+		clock-names = "oscclk", "clk0", "clk1";
 	};
 
 	clock: clock-controller@10010000 {
-- 
2.5.0


WARNING: multiple messages have this Message-ID (diff)
From: tomeu.vizoso@collabora.com (Tomeu Vizoso)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v2 2/2] ARM: dts: exynos5250: Add clocks to DISP1 domain
Date: Thu, 15 Oct 2015 12:31:24 +0200	[thread overview]
Message-ID: <1444905084-22540-3-git-send-email-tomeu.vizoso@collabora.com> (raw)
In-Reply-To: <1444905084-22540-1-git-send-email-tomeu.vizoso@collabora.com>

Adds to the node of the DISP1 power domain the two clocks that need to
be reparented while the domain is powered off:
CLK_MOUT_ACLK200_DISP1_SUB and CLK_MOUT_ACLK300_DISP1_SUB.

Otherwise the state is unknown at power up and the mixer's clocks are
all messed up.

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Link: http://lkml.kernel.org/g/561CDC33.7050103 at collabora.com
---


 arch/arm/boot/dts/exynos5250.dtsi | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/arch/arm/boot/dts/exynos5250.dtsi b/arch/arm/boot/dts/exynos5250.dtsi
index b24610ea8c2a..88b9cf5f226f 100644
--- a/arch/arm/boot/dts/exynos5250.dtsi
+++ b/arch/arm/boot/dts/exynos5250.dtsi
@@ -130,6 +130,10 @@
 		compatible = "samsung,exynos4210-pd";
 		reg = <0x100440A0 0x20>;
 		#power-domain-cells = <0>;
+		clocks = <&clock CLK_FIN_PLL>,
+			 <&clock CLK_MOUT_ACLK200_DISP1_SUB>,
+			 <&clock CLK_MOUT_ACLK300_DISP1_SUB>;
+		clock-names = "oscclk", "clk0", "clk1";
 	};
 
 	clock: clock-controller at 10010000 {
-- 
2.5.0

  parent reply	other threads:[~2015-10-15 10:32 UTC|newest]

Thread overview: 39+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-10-15 10:31 [PATCH v2 0/2] Fix display on second resume on 5250-snow Tomeu Vizoso
2015-10-15 10:31 ` Tomeu Vizoso
2015-10-15 10:31 ` Tomeu Vizoso
2015-10-15 10:31 ` [PATCH v2 1/2] clk: samsung: exynos5250: Add DISP1 clocks Tomeu Vizoso
2015-10-15 10:31   ` Tomeu Vizoso
2015-10-15 23:46   ` Krzysztof Kozlowski
2015-10-15 23:46     ` Krzysztof Kozlowski
2015-10-16 12:49     ` Michael Turquette
2015-10-16 12:49       ` Michael Turquette
2015-10-16 12:49       ` Michael Turquette
2015-10-16 12:49       ` Michael Turquette
2015-10-16 17:26       ` Stephen Boyd
2015-10-16 17:26         ` Stephen Boyd
2015-10-16 18:56         ` Tomeu Vizoso
2015-10-16 18:56           ` Tomeu Vizoso
2015-10-16 18:56           ` Tomeu Vizoso
2015-10-16 18:56           ` Tomeu Vizoso
2015-10-16 23:41           ` Kukjin Kim
2015-10-16 23:41             ` Kukjin Kim
2015-10-16 23:41             ` Kukjin Kim
2015-10-16 23:41             ` Kukjin Kim
2015-10-17  8:53             ` Krzysztof Kozlowski
2015-10-17  8:53               ` Krzysztof Kozlowski
2015-10-17  8:53               ` Krzysztof Kozlowski
2015-10-17  8:53               ` Krzysztof Kozlowski
2015-10-17  9:55               ` Javier Martinez Canillas
2015-10-17  9:55                 ` Javier Martinez Canillas
2015-10-17  9:55                 ` Javier Martinez Canillas
2015-10-17  9:55                 ` Javier Martinez Canillas
2015-10-17 10:08                 ` Krzysztof Kozlowski
2015-10-17 10:08                   ` Krzysztof Kozlowski
2015-10-17 10:08                   ` Krzysztof Kozlowski
2015-10-17 10:08                   ` Krzysztof Kozlowski
2015-10-15 10:31 ` Tomeu Vizoso [this message]
2015-10-15 10:31   ` [PATCH v2 2/2] ARM: dts: exynos5250: Add clocks to DISP1 domain Tomeu Vizoso
2015-10-15 23:44   ` Krzysztof Kozlowski
2015-10-15 23:44     ` Krzysztof Kozlowski
2015-10-16  8:19     ` Tomeu Vizoso
2015-10-16  8:19       ` Tomeu Vizoso

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