From: Linus Walleij <linus.walleij-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org> To: linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org, Arnd Bergmann <arnd-r2nGTMty4D4@public.gmane.org>, Russell King <linux-lFZ/pmaqli7XmaaqVzeoHQ@public.gmane.org> Cc: Pawel Moll <pawel.moll-5wv7dgnIgG8@public.gmane.org>, Mark Rutland <mark.rutland-5wv7dgnIgG8@public.gmane.org>, Marc Zyngier <marc.zyngier-5wv7dgnIgG8@public.gmane.org>, Will Deacon <will.deacon-5wv7dgnIgG8@public.gmane.org>, Rob Herring <robh-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>, Linus Walleij <linus.walleij-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>, devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org Subject: [PATCH 01/13] ARM: add some L220 DT settings Date: Thu, 15 Oct 2015 15:46:41 +0200 [thread overview] Message-ID: <1444916813-31024-2-git-send-email-linus.walleij@linaro.org> (raw) In-Reply-To: <1444916813-31024-1-git-send-email-linus.walleij-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org> The RealView ARM11MPCore enables parity, eventmon and shared override in the cache controller through its current boardfile, but the code and DT bindings for the ARM L220 is currently lacking the ability to set this up from DT. Add the required bool parameters. Cc: devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org Signed-off-by: Linus Walleij <linus.walleij-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org> --- I know this patch mixes code and DT changes but it is silly to split such a small patch. Will submit this to Russell's patch tracker if it looks OK to the DT people. (Or if they are quiet.) --- Documentation/devicetree/bindings/arm/l2cc.txt | 10 ++++++---- arch/arm/mm/cache-l2x0.c | 15 +++++++++++++++ 2 files changed, 21 insertions(+), 4 deletions(-) diff --git a/Documentation/devicetree/bindings/arm/l2cc.txt b/Documentation/devicetree/bindings/arm/l2cc.txt index 06c88a4d28ac..4d262e9b3464 100644 --- a/Documentation/devicetree/bindings/arm/l2cc.txt +++ b/Documentation/devicetree/bindings/arm/l2cc.txt @@ -67,12 +67,14 @@ Optional properties: disable if zero. - arm,prefetch-offset : Override prefetch offset value. Valid values are 0-7, 15, 23, and 31. -- arm,shared-override : The default behavior of the pl310 cache controller with - respect to the shareable attribute is to transform "normal memory - non-cacheable transactions" into "cacheable no allocate" (for reads) or - "write through no write allocate" (for writes). +- arm,shared-override : The default behavior of the PL220 or PL310 cache + controllers with respect to the shareable attribute is to transform "normal + memory non-cacheable transactions" into "cacheable no allocate" (for reads) + or "write through no write allocate" (for writes). On systems where this may cause DMA buffer corruption, this property must be specified to indicate that such transforms are precluded. +- arm,parity-enable : enable parity checking on the L2 cache (PL220 only). +- arm,eventmon-enable : enable the event monitor on the L2 cache (PL220 only). - prefetch-data : Data prefetch. Value: <0> (forcibly disable), <1> (forcibly enable), property absent (retain settings set by firmware) - prefetch-instr : Instruction prefetch. Value: <0> (forcibly disable), diff --git a/arch/arm/mm/cache-l2x0.c b/arch/arm/mm/cache-l2x0.c index 493692d838c6..d4e9fa2594f3 100644 --- a/arch/arm/mm/cache-l2x0.c +++ b/arch/arm/mm/cache-l2x0.c @@ -1060,6 +1060,21 @@ static void __init l2x0_of_parse(const struct device_node *np, val |= (dirty - 1) << L2X0_AUX_CTRL_DIRTY_LATENCY_SHIFT; } + if (of_property_read_bool(np, "arm,parity-enable")) { + mask &= ~L2C_AUX_CTRL_PARITY_ENABLE; + val |= L2C_AUX_CTRL_PARITY_ENABLE; + } + + if (of_property_read_bool(np, "arm,eventmon-enable")) { + mask &= ~L2C_AUX_CTRL_EVTMON_ENABLE; + val |= L2C_AUX_CTRL_EVTMON_ENABLE; + } + + if (of_property_read_bool(np, "arm,shared-override")) { + mask &= ~L2C_AUX_CTRL_SHARED_OVERRIDE; + val |= L2C_AUX_CTRL_SHARED_OVERRIDE; + } + ret = l2x0_cache_size_of_parse(np, aux_val, aux_mask, &assoc, SZ_256K); if (ret) return; -- 2.4.3 -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org More majordomo info at http://vger.kernel.org/majordomo-info.html
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From: linus.walleij@linaro.org (Linus Walleij) To: linux-arm-kernel@lists.infradead.org Subject: [PATCH 01/13] ARM: add some L220 DT settings Date: Thu, 15 Oct 2015 15:46:41 +0200 [thread overview] Message-ID: <1444916813-31024-2-git-send-email-linus.walleij@linaro.org> (raw) In-Reply-To: <1444916813-31024-1-git-send-email-linus.walleij@linaro.org> The RealView ARM11MPCore enables parity, eventmon and shared override in the cache controller through its current boardfile, but the code and DT bindings for the ARM L220 is currently lacking the ability to set this up from DT. Add the required bool parameters. Cc: devicetree at vger.kernel.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org> --- I know this patch mixes code and DT changes but it is silly to split such a small patch. Will submit this to Russell's patch tracker if it looks OK to the DT people. (Or if they are quiet.) --- Documentation/devicetree/bindings/arm/l2cc.txt | 10 ++++++---- arch/arm/mm/cache-l2x0.c | 15 +++++++++++++++ 2 files changed, 21 insertions(+), 4 deletions(-) diff --git a/Documentation/devicetree/bindings/arm/l2cc.txt b/Documentation/devicetree/bindings/arm/l2cc.txt index 06c88a4d28ac..4d262e9b3464 100644 --- a/Documentation/devicetree/bindings/arm/l2cc.txt +++ b/Documentation/devicetree/bindings/arm/l2cc.txt @@ -67,12 +67,14 @@ Optional properties: disable if zero. - arm,prefetch-offset : Override prefetch offset value. Valid values are 0-7, 15, 23, and 31. -- arm,shared-override : The default behavior of the pl310 cache controller with - respect to the shareable attribute is to transform "normal memory - non-cacheable transactions" into "cacheable no allocate" (for reads) or - "write through no write allocate" (for writes). +- arm,shared-override : The default behavior of the PL220 or PL310 cache + controllers with respect to the shareable attribute is to transform "normal + memory non-cacheable transactions" into "cacheable no allocate" (for reads) + or "write through no write allocate" (for writes). On systems where this may cause DMA buffer corruption, this property must be specified to indicate that such transforms are precluded. +- arm,parity-enable : enable parity checking on the L2 cache (PL220 only). +- arm,eventmon-enable : enable the event monitor on the L2 cache (PL220 only). - prefetch-data : Data prefetch. Value: <0> (forcibly disable), <1> (forcibly enable), property absent (retain settings set by firmware) - prefetch-instr : Instruction prefetch. Value: <0> (forcibly disable), diff --git a/arch/arm/mm/cache-l2x0.c b/arch/arm/mm/cache-l2x0.c index 493692d838c6..d4e9fa2594f3 100644 --- a/arch/arm/mm/cache-l2x0.c +++ b/arch/arm/mm/cache-l2x0.c @@ -1060,6 +1060,21 @@ static void __init l2x0_of_parse(const struct device_node *np, val |= (dirty - 1) << L2X0_AUX_CTRL_DIRTY_LATENCY_SHIFT; } + if (of_property_read_bool(np, "arm,parity-enable")) { + mask &= ~L2C_AUX_CTRL_PARITY_ENABLE; + val |= L2C_AUX_CTRL_PARITY_ENABLE; + } + + if (of_property_read_bool(np, "arm,eventmon-enable")) { + mask &= ~L2C_AUX_CTRL_EVTMON_ENABLE; + val |= L2C_AUX_CTRL_EVTMON_ENABLE; + } + + if (of_property_read_bool(np, "arm,shared-override")) { + mask &= ~L2C_AUX_CTRL_SHARED_OVERRIDE; + val |= L2C_AUX_CTRL_SHARED_OVERRIDE; + } + ret = l2x0_cache_size_of_parse(np, aux_val, aux_mask, &assoc, SZ_256K); if (ret) return; -- 2.4.3
next prev parent reply other threads:[~2015-10-15 13:46 UTC|newest] Thread overview: 62+ messages / expand[flat|nested] mbox.gz Atom feed top 2015-10-15 13:46 [PATCH 00/13] Device Tree support for RealView PB11MPCore Linus Walleij 2015-10-15 13:46 ` [PATCH 02/13] ARM: add DT bindings for the ARM11MPCore CPU cluster Linus Walleij [not found] ` <1444916813-31024-1-git-send-email-linus.walleij-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org> 2015-10-15 13:46 ` Linus Walleij [this message] 2015-10-15 13:46 ` [PATCH 01/13] ARM: add some L220 DT settings Linus Walleij [not found] ` <1444916813-31024-2-git-send-email-linus.walleij-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org> 2015-10-15 13:57 ` Russell King - ARM Linux 2015-10-15 13:57 ` Russell King - ARM Linux [not found] ` <20151015135730.GC32532-l+eeeJia6m9vn6HldHNs0ANdhmdF6hFW@public.gmane.org> 2015-10-22 12:57 ` Linus Walleij 2015-10-22 12:57 ` Linus Walleij 2015-10-15 13:58 ` Rob Herring 2015-10-15 13:58 ` Rob Herring 2015-10-15 13:46 ` [PATCH 03/13] irqchips: fix ARM11MPCore GIC bindings Linus Walleij 2015-10-15 13:46 ` Linus Walleij [not found] ` <1444916813-31024-4-git-send-email-linus.walleij-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org> 2015-11-02 14:35 ` Rob Herring 2015-11-02 14:35 ` Rob Herring 2015-10-15 13:46 ` [PATCH 04/13] irqchip/gic: support RealView variant setup Linus Walleij 2015-10-15 16:06 ` Marc Zyngier 2015-10-16 8:28 ` Thomas Gleixner 2015-10-15 13:46 ` [PATCH 05/13] irqchip/gic: assign irqchip dynamically Linus Walleij 2015-10-15 16:16 ` Marc Zyngier 2015-10-15 13:46 ` [PATCH 06/13] clk: versatile-icst: convert to use regmap Linus Walleij 2015-10-15 13:46 ` Linus Walleij 2015-10-15 19:08 ` Stephen Boyd 2015-10-15 19:08 ` Stephen Boyd 2015-10-23 9:27 ` Linus Walleij 2015-10-23 9:27 ` Linus Walleij 2015-10-23 9:37 ` Linus Walleij 2015-10-23 9:37 ` Linus Walleij 2015-10-23 16:24 ` Stephen Boyd 2015-10-23 16:24 ` Stephen Boyd 2015-10-27 15:56 ` Linus Walleij 2015-10-27 15:56 ` Linus Walleij 2015-10-15 13:46 ` [PATCH 07/13] clk: versatile-icst: refactor to allocate regmap separately Linus Walleij 2015-10-15 13:46 ` Linus Walleij 2015-10-15 19:10 ` Stephen Boyd 2015-10-15 19:10 ` Stephen Boyd 2015-10-15 19:28 ` Stephen Boyd 2015-10-15 19:28 ` Stephen Boyd 2015-10-15 13:46 ` [PATCH 08/13] clk: add ARM syscon ICST device tree bindings Linus Walleij 2015-10-15 13:46 ` Linus Walleij 2015-10-15 19:23 ` Stephen Boyd 2015-10-15 19:23 ` Stephen Boyd [not found] ` <20151015192325.GN4558-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org> 2015-10-23 9:48 ` Linus Walleij 2015-10-23 9:48 ` Linus Walleij 2015-10-23 9:48 ` Linus Walleij 2015-10-23 16:43 ` Stephen Boyd 2015-10-23 16:43 ` Stephen Boyd 2015-10-15 13:46 ` [PATCH 09/13] clk: versatile-icst: add device tree support Linus Walleij 2015-10-15 13:46 ` Linus Walleij 2015-10-15 19:26 ` Stephen Boyd 2015-10-15 19:26 ` Stephen Boyd 2015-10-26 13:14 ` Linus Walleij 2015-10-26 13:14 ` Linus Walleij 2015-10-26 13:31 ` Russell King - ARM Linux 2015-10-26 13:31 ` Russell King - ARM Linux 2015-10-29 13:00 ` Linus Walleij 2015-10-29 13:00 ` Linus Walleij 2015-10-15 19:28 ` Stephen Boyd 2015-10-15 19:28 ` Stephen Boyd 2015-10-15 13:46 ` [PATCH 10/13] soc: versatile: add support for the PB11MPCore Linus Walleij 2015-10-15 13:46 ` [PATCH 11/13] ARM: realview: select SP810 and ICST for the DT variant Linus Walleij 2015-10-15 13:46 ` [PATCH 12/13] ARM: realview: add an DT SMP boot method Linus Walleij 2015-10-15 13:46 ` [PATCH 13/13] ARM: realview: add device tree for PB11MPCore Linus Walleij
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