From: Chris Zhong <zyw@rock-chips.com> To: heiko@sntech.de, linux-rockchip@lists.infradead.org, mark.yao@rock-chips.com, treding@nvidia.com Cc: Chris Zhong <zyw@rock-chips.com>, Michael Turquette <mturquette@baylibre.com>, Stephen Boyd <sboyd@codeaurora.org>, linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v5 02/11] clk: rockchip: add mipidsi clocks on rk3288 Date: Thu, 26 Nov 2015 15:50:16 +0800 [thread overview] Message-ID: <1448524225-5489-3-git-send-email-zyw@rock-chips.com> (raw) In-Reply-To: <1448524225-5489-1-git-send-email-zyw@rock-chips.com> sclk_mipidsi_24m is the gating of mipi dsi phy. Signed-off-by: Chris Zhong <zyw@rock-chips.com> Acked-by: Stephen Boyd <sboyd@codeaurora.org> --- Changes in v5: - modify the mipidsi clk name to SCLK_MIPIDSI_24M Changes in v4: None Changes in v3: None Changes in v2: None drivers/clk/rockchip/clk-rk3288.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/clk/rockchip/clk-rk3288.c b/drivers/clk/rockchip/clk-rk3288.c index 9040878..bee96e7 100644 --- a/drivers/clk/rockchip/clk-rk3288.c +++ b/drivers/clk/rockchip/clk-rk3288.c @@ -709,7 +709,7 @@ static struct rockchip_clk_branch rk3288_clk_branches[] __initdata = { GATE(SCLK_LCDC_PWM1, "sclk_lcdc_pwm1", "xin24m", 0, RK3288_CLKGATE_CON(13), 11, GFLAGS), GATE(SCLK_PVTM_CORE, "sclk_pvtm_core", "xin24m", 0, RK3288_CLKGATE_CON(5), 9, GFLAGS), GATE(SCLK_PVTM_GPU, "sclk_pvtm_gpu", "xin24m", 0, RK3288_CLKGATE_CON(5), 10, GFLAGS), - GATE(0, "sclk_mipidsi_24m", "xin24m", 0, RK3288_CLKGATE_CON(5), 15, GFLAGS), + GATE(SCLK_MIPIDSI_24M, "sclk_mipidsi_24m", "xin24m", 0, RK3288_CLKGATE_CON(5), 15, GFLAGS), /* sclk_gpu gates */ GATE(ACLK_GPU, "aclk_gpu", "sclk_gpu", 0, RK3288_CLKGATE_CON(18), 0, GFLAGS), -- 2.6.3
WARNING: multiple messages have this Message-ID (diff)
From: zyw@rock-chips.com (Chris Zhong) To: linux-arm-kernel@lists.infradead.org Subject: [PATCH v5 02/11] clk: rockchip: add mipidsi clocks on rk3288 Date: Thu, 26 Nov 2015 15:50:16 +0800 [thread overview] Message-ID: <1448524225-5489-3-git-send-email-zyw@rock-chips.com> (raw) In-Reply-To: <1448524225-5489-1-git-send-email-zyw@rock-chips.com> sclk_mipidsi_24m is the gating of mipi dsi phy. Signed-off-by: Chris Zhong <zyw@rock-chips.com> Acked-by: Stephen Boyd <sboyd@codeaurora.org> --- Changes in v5: - modify the mipidsi clk name to SCLK_MIPIDSI_24M Changes in v4: None Changes in v3: None Changes in v2: None drivers/clk/rockchip/clk-rk3288.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/clk/rockchip/clk-rk3288.c b/drivers/clk/rockchip/clk-rk3288.c index 9040878..bee96e7 100644 --- a/drivers/clk/rockchip/clk-rk3288.c +++ b/drivers/clk/rockchip/clk-rk3288.c @@ -709,7 +709,7 @@ static struct rockchip_clk_branch rk3288_clk_branches[] __initdata = { GATE(SCLK_LCDC_PWM1, "sclk_lcdc_pwm1", "xin24m", 0, RK3288_CLKGATE_CON(13), 11, GFLAGS), GATE(SCLK_PVTM_CORE, "sclk_pvtm_core", "xin24m", 0, RK3288_CLKGATE_CON(5), 9, GFLAGS), GATE(SCLK_PVTM_GPU, "sclk_pvtm_gpu", "xin24m", 0, RK3288_CLKGATE_CON(5), 10, GFLAGS), - GATE(0, "sclk_mipidsi_24m", "xin24m", 0, RK3288_CLKGATE_CON(5), 15, GFLAGS), + GATE(SCLK_MIPIDSI_24M, "sclk_mipidsi_24m", "xin24m", 0, RK3288_CLKGATE_CON(5), 15, GFLAGS), /* sclk_gpu gates */ GATE(ACLK_GPU, "aclk_gpu", "sclk_gpu", 0, RK3288_CLKGATE_CON(18), 0, GFLAGS), -- 2.6.3
next prev parent reply other threads:[~2015-11-26 7:50 UTC|newest] Thread overview: 31+ messages / expand[flat|nested] mbox.gz Atom feed top 2015-11-26 7:50 [PATCH v5 0/11] Add mipi dsi support for rk3288 Chris Zhong 2015-11-26 7:50 ` Chris Zhong 2015-11-26 7:50 ` Chris Zhong 2015-11-26 7:50 ` [PATCH v5 01/11] clk: rockchip: add id for mipidsi sclk on rk3288 Chris Zhong 2015-11-26 7:50 ` Chris Zhong 2015-11-26 13:57 ` Heiko Stübner 2015-11-26 13:57 ` Heiko Stübner 2015-11-26 7:50 ` Chris Zhong [this message] 2015-11-26 7:50 ` [PATCH v5 02/11] clk: rockchip: add mipidsi clocks " Chris Zhong 2015-11-26 13:58 ` Heiko Stübner 2015-11-26 13:58 ` Heiko Stübner 2015-11-26 7:50 ` [PATCH v5 03/11] drm/rockchip: return a true clock rate to adjusted_mode Chris Zhong 2015-11-26 7:50 ` Chris Zhong 2015-11-26 7:50 ` Chris Zhong 2015-11-26 7:50 ` [PATCH v5 04/11] drm/dsi: Add a helper to get bits per pixel of MIPI DSI pixel format Chris Zhong 2015-11-26 7:50 ` Chris Zhong 2015-11-26 7:50 ` [PATCH v5 05/11] drm: bridge: allow some funcs to be optional Chris Zhong 2015-11-26 7:50 ` Chris Zhong 2015-11-26 7:50 ` [PATCH v5 06/11] Documentation: dt-bindings: Add bindings for DW MIPI DSI Chris Zhong 2015-11-26 7:50 ` Chris Zhong 2015-11-26 7:50 ` [PATCH v5 07/11] drm/bridge: Add Synopsys DesignWare MIPI DSI host controller driver Chris Zhong 2015-11-26 7:50 ` [PATCH v5 08/11] drm: rockchip: Support Synopsys DesignWare MIPI DSI host controller Chris Zhong 2015-11-26 7:50 ` Chris Zhong 2015-11-26 7:50 ` Chris Zhong 2015-11-26 7:50 ` [PATCH v5 09/11] Documentation: dt-bindings: Add bindings for rk3288 DW MIPI DSI driver Chris Zhong 2015-11-26 7:50 ` Chris Zhong 2015-11-26 7:50 ` [PATCH v5 10/11] ARM: dts: rockchip: add rk3288 mipi_dsi nodes Chris Zhong 2015-11-26 7:50 ` Chris Zhong 2015-11-26 7:50 ` Chris Zhong 2015-11-26 7:50 ` [PATCH v5 11/11] ARM: dts: rockchip: add support mipi panel tv080wum-nl0 for rk3288-evb Chris Zhong 2015-11-26 7:50 ` Chris Zhong
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