From: Chanwoo Choi <cw00.choi@samsung.com> To: myungjoo.ham@samsung.com, kyungmin.park@samsung.com, kgene@kernel.org, k.kozlowski@samsung.com Cc: robh+dt@kernel.org, pawel.moll@arm.com, mark.rutland@arm.com, ijc+devicetree@hellion.org.uk, galak@codeaurora.org, linux@arm.linux.org.uk, tjakobi@math.uni-bielefeld.de, cw00.choi@samsung.com, linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org, linux-samsung-soc@vger.kernel.org, devicetree@vger.kernel.org Subject: [RFC PATCH 11/15] ARM: dts: Add bus nodes using VDD_INT for Exynos3250 Date: Thu, 26 Nov 2015 22:47:35 +0900 [thread overview] Message-ID: <1448545659-32287-12-git-send-email-cw00.choi@samsung.com> (raw) In-Reply-To: <1448545659-32287-1-git-send-email-cw00.choi@samsung.com> This patch adds the bus nodes using VDD_INT for Exynos3250 SoC. Exynos3250 has following AXI buses to translate data between DRAM and sub-blocks. Following list specifies the detailed relation between DRAM and sub-blocks: - ACLK400 clock for MCUISP - ACLK266 clock for ISP - ACLK200 clock for FSYS - ACLK160 clock for LCD0 - ACLK100 clock for PERIL - GDL clock for LEFTBUS - GDR clock for RIGHTBUS Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com> --- arch/arm/boot/dts/exynos3250.dtsi | 152 ++++++++++++++++++++++++++++++++++++++ 1 file changed, 152 insertions(+) diff --git a/arch/arm/boot/dts/exynos3250.dtsi b/arch/arm/boot/dts/exynos3250.dtsi index 45809f83c628..2e5d60c24004 100644 --- a/arch/arm/boot/dts/exynos3250.dtsi +++ b/arch/arm/boot/dts/exynos3250.dtsi @@ -734,6 +734,158 @@ opp-microvolt = <875000>; }; }; + + bus_leftbus: bus_leftbus { + compatible = "samsung,exynos-bus"; + clocks = <&cmu CLK_DIV_GDL>; + clock-names = "bus"; + operating-points-v2 = <&bus_leftbus_opp_table>; + status = "disabled"; + }; + + bus_rightbus: bus_rightbus { + compatible = "samsung,exynos-bus"; + clocks = <&cmu CLK_DIV_GDR>; + clock-names = "bus"; + operating-points-v2 = <&bus_leftbus_opp_table>; + status = "disabled"; + }; + + bus_lcd0: bus_lcd0 { + compatible = "samsung,exynos-bus"; + clocks = <&cmu CLK_DIV_ACLK_160>; + clock-names = "bus"; + operating-points-v2 = <&bus_leftbus_opp_table>; + status = "disabled"; + }; + + bus_fsys: bus_fsys { + compatible = "samsung,exynos-bus"; + clocks = <&cmu CLK_DIV_ACLK_200>; + clock-names = "bus"; + operating-points-v2 = <&bus_leftbus_opp_table>; + status = "disabled"; + }; + + bus_mcuisp: bus_mcuisp { + compatible = "samsung,exynos-bus"; + clocks = <&cmu CLK_DIV_ACLK_400_MCUISP>; + clock-names = "bus"; + operating-points-v2 = <&bus_mcuisp_opp_table>; + status = "disabled"; + }; + + bus_isp: bus_isp { + compatible = "samsung,exynos-bus"; + clocks = <&cmu CLK_DIV_ACLK_266>; + clock-names = "bus"; + operating-points-v2 = <&bus_isp_opp_table>; + status = "disabled"; + }; + + bus_peril: bus_peril { + compatible = "samsung,exynos-bus"; + clocks = <&cmu CLK_DIV_ACLK_100>; + clock-names = "bus"; + operating-points-v2 = <&bus_peril_opp_table>; + status = "disabled"; + }; + + bus_leftbus_opp_table: opp_table1 { + compatible = "operating-points-v2"; + opp-shared; + + opp00 { + opp-hz = /bits/ 64 <50000000>; + opp-microvolt = <900000>; + }; + opp01 { + opp-hz = /bits/ 64 <80000000>; + opp-microvolt = <900000>; + }; + opp02 { + opp-hz = /bits/ 64 <100000000>; + opp-microvolt = <1000000>; + }; + opp03 { + opp-hz = /bits/ 64 <133000000>; + opp-microvolt = <1000000>; + }; + opp04 { + opp-hz = /bits/ 64 <200000000>; + opp-microvolt = <1000000>; + }; + }; + + bus_mcuisp_opp_table: opp_table2 { + compatible = "operating-points-v2"; + opp-shared; + + opp00 { + opp-hz = /bits/ 64 <50000000>; + opp-microvolt = <900000>; + }; + opp01 { + opp-hz = /bits/ 64 <80000000>; + opp-microvolt = <900000>; + }; + opp02 { + opp-hz = /bits/ 64 <100000000>; + opp-microvolt = <1000000>; + }; + opp03 { + opp-hz = /bits/ 64 <200000000>; + opp-microvolt = <1000000>; + }; + opp04 { + opp-hz = /bits/ 64 <400000000>; + opp-microvolt = <1000000>; + }; + }; + + bus_isp_opp_table: opp_table3 { + compatible = "operating-points-v2"; + opp-shared; + + opp00 { + opp-hz = /bits/ 64 <50000000>; + opp-microvolt = <900000>; + }; + opp01 { + opp-hz = /bits/ 64 <80000000>; + opp-microvolt = <900000>; + }; + opp02 { + opp-hz = /bits/ 64 <100000000>; + opp-microvolt = <1000000>; + }; + opp03 { + opp-hz = /bits/ 64 <200000000>; + opp-microvolt = <1000000>; + }; + opp04 { + opp-hz = /bits/ 64 <300000000>; + opp-microvolt = <1000000>; + }; + }; + + bus_peril_opp_table: opp_table4 { + compatible = "operating-points-v2"; + opp-shared; + + opp00 { + opp-hz = /bits/ 64 <50000000>; + opp-microvolt = <900000>; + }; + opp01 { + opp-hz = /bits/ 64 <80000000>; + opp-microvolt = <900000>; + }; + opp02 { + opp-hz = /bits/ 64 <100000000>; + opp-microvolt = <1000000>; + }; + }; }; }; -- 1.9.1
WARNING: multiple messages have this Message-ID (diff)
From: Chanwoo Choi <cw00.choi-Sze3O3UU22JBDgjK7y7TUQ@public.gmane.org> To: myungjoo.ham-Sze3O3UU22JBDgjK7y7TUQ@public.gmane.org, kyungmin.park-Sze3O3UU22JBDgjK7y7TUQ@public.gmane.org, kgene-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org, k.kozlowski-Sze3O3UU22JBDgjK7y7TUQ@public.gmane.org Cc: robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org, pawel.moll-5wv7dgnIgG8@public.gmane.org, mark.rutland-5wv7dgnIgG8@public.gmane.org, ijc+devicetree-KcIKpvwj1kUDXYZnReoRVg@public.gmane.org, galak-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org, linux-lFZ/pmaqli7XmaaqVzeoHQ@public.gmane.org, tjakobi-o02PS0xoJP9W0yFyLvAVXMxlOr/tl8fh@public.gmane.org, cw00.choi-Sze3O3UU22JBDgjK7y7TUQ@public.gmane.org, linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, linux-pm-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, linux-samsung-soc-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org Subject: [RFC PATCH 11/15] ARM: dts: Add bus nodes using VDD_INT for Exynos3250 Date: Thu, 26 Nov 2015 22:47:35 +0900 [thread overview] Message-ID: <1448545659-32287-12-git-send-email-cw00.choi@samsung.com> (raw) In-Reply-To: <1448545659-32287-1-git-send-email-cw00.choi-Sze3O3UU22JBDgjK7y7TUQ@public.gmane.org> This patch adds the bus nodes using VDD_INT for Exynos3250 SoC. Exynos3250 has following AXI buses to translate data between DRAM and sub-blocks. Following list specifies the detailed relation between DRAM and sub-blocks: - ACLK400 clock for MCUISP - ACLK266 clock for ISP - ACLK200 clock for FSYS - ACLK160 clock for LCD0 - ACLK100 clock for PERIL - GDL clock for LEFTBUS - GDR clock for RIGHTBUS Signed-off-by: Chanwoo Choi <cw00.choi-Sze3O3UU22JBDgjK7y7TUQ@public.gmane.org> --- arch/arm/boot/dts/exynos3250.dtsi | 152 ++++++++++++++++++++++++++++++++++++++ 1 file changed, 152 insertions(+) diff --git a/arch/arm/boot/dts/exynos3250.dtsi b/arch/arm/boot/dts/exynos3250.dtsi index 45809f83c628..2e5d60c24004 100644 --- a/arch/arm/boot/dts/exynos3250.dtsi +++ b/arch/arm/boot/dts/exynos3250.dtsi @@ -734,6 +734,158 @@ opp-microvolt = <875000>; }; }; + + bus_leftbus: bus_leftbus { + compatible = "samsung,exynos-bus"; + clocks = <&cmu CLK_DIV_GDL>; + clock-names = "bus"; + operating-points-v2 = <&bus_leftbus_opp_table>; + status = "disabled"; + }; + + bus_rightbus: bus_rightbus { + compatible = "samsung,exynos-bus"; + clocks = <&cmu CLK_DIV_GDR>; + clock-names = "bus"; + operating-points-v2 = <&bus_leftbus_opp_table>; + status = "disabled"; + }; + + bus_lcd0: bus_lcd0 { + compatible = "samsung,exynos-bus"; + clocks = <&cmu CLK_DIV_ACLK_160>; + clock-names = "bus"; + operating-points-v2 = <&bus_leftbus_opp_table>; + status = "disabled"; + }; + + bus_fsys: bus_fsys { + compatible = "samsung,exynos-bus"; + clocks = <&cmu CLK_DIV_ACLK_200>; + clock-names = "bus"; + operating-points-v2 = <&bus_leftbus_opp_table>; + status = "disabled"; + }; + + bus_mcuisp: bus_mcuisp { + compatible = "samsung,exynos-bus"; + clocks = <&cmu CLK_DIV_ACLK_400_MCUISP>; + clock-names = "bus"; + operating-points-v2 = <&bus_mcuisp_opp_table>; + status = "disabled"; + }; + + bus_isp: bus_isp { + compatible = "samsung,exynos-bus"; + clocks = <&cmu CLK_DIV_ACLK_266>; + clock-names = "bus"; + operating-points-v2 = <&bus_isp_opp_table>; + status = "disabled"; + }; + + bus_peril: bus_peril { + compatible = "samsung,exynos-bus"; + clocks = <&cmu CLK_DIV_ACLK_100>; + clock-names = "bus"; + operating-points-v2 = <&bus_peril_opp_table>; + status = "disabled"; + }; + + bus_leftbus_opp_table: opp_table1 { + compatible = "operating-points-v2"; + opp-shared; + + opp00 { + opp-hz = /bits/ 64 <50000000>; + opp-microvolt = <900000>; + }; + opp01 { + opp-hz = /bits/ 64 <80000000>; + opp-microvolt = <900000>; + }; + opp02 { + opp-hz = /bits/ 64 <100000000>; + opp-microvolt = <1000000>; + }; + opp03 { + opp-hz = /bits/ 64 <133000000>; + opp-microvolt = <1000000>; + }; + opp04 { + opp-hz = /bits/ 64 <200000000>; + opp-microvolt = <1000000>; + }; + }; + + bus_mcuisp_opp_table: opp_table2 { + compatible = "operating-points-v2"; + opp-shared; + + opp00 { + opp-hz = /bits/ 64 <50000000>; + opp-microvolt = <900000>; + }; + opp01 { + opp-hz = /bits/ 64 <80000000>; + opp-microvolt = <900000>; + }; + opp02 { + opp-hz = /bits/ 64 <100000000>; + opp-microvolt = <1000000>; + }; + opp03 { + opp-hz = /bits/ 64 <200000000>; + opp-microvolt = <1000000>; + }; + opp04 { + opp-hz = /bits/ 64 <400000000>; + opp-microvolt = <1000000>; + }; + }; + + bus_isp_opp_table: opp_table3 { + compatible = "operating-points-v2"; + opp-shared; + + opp00 { + opp-hz = /bits/ 64 <50000000>; + opp-microvolt = <900000>; + }; + opp01 { + opp-hz = /bits/ 64 <80000000>; + opp-microvolt = <900000>; + }; + opp02 { + opp-hz = /bits/ 64 <100000000>; + opp-microvolt = <1000000>; + }; + opp03 { + opp-hz = /bits/ 64 <200000000>; + opp-microvolt = <1000000>; + }; + opp04 { + opp-hz = /bits/ 64 <300000000>; + opp-microvolt = <1000000>; + }; + }; + + bus_peril_opp_table: opp_table4 { + compatible = "operating-points-v2"; + opp-shared; + + opp00 { + opp-hz = /bits/ 64 <50000000>; + opp-microvolt = <900000>; + }; + opp01 { + opp-hz = /bits/ 64 <80000000>; + opp-microvolt = <900000>; + }; + opp02 { + opp-hz = /bits/ 64 <100000000>; + opp-microvolt = <1000000>; + }; + }; }; }; -- 1.9.1 -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org More majordomo info at http://vger.kernel.org/majordomo-info.html
next prev parent reply other threads:[~2015-11-26 13:51 UTC|newest] Thread overview: 33+ messages / expand[flat|nested] mbox.gz Atom feed top 2015-11-26 13:47 [RFC PATCH 00/15] PM / devferq: Add generic exynos bus frequency driver and new passive governor Chanwoo Choi 2015-11-26 13:47 ` [RFC PATCH 01/15] PM / devfreq: exynos: Add generic exynos bus frequency driver Chanwoo Choi 2015-11-26 14:00 ` MyungJoo Ham 2015-11-26 14:00 ` MyungJoo Ham 2015-11-26 16:12 ` Chanwoo Choi 2015-11-26 17:17 ` Anand Moon 2015-11-27 0:34 ` Chanwoo Choi 2015-12-09 4:11 ` Chanwoo Choi 2015-12-09 4:19 ` Anand Moon 2015-11-26 13:47 ` [RFC PATCH 02/15] PM / devfreq: exynos: Add documentation for " Chanwoo Choi 2015-11-27 20:30 ` Rob Herring 2015-11-28 2:13 ` Chanwoo Choi 2015-11-28 2:13 ` Chanwoo Choi 2015-11-26 13:47 ` [RFC PATCH 03/15] ARM: dts: Add DMC bus node for Exynos3250 Chanwoo Choi 2015-11-26 13:47 ` [RFC PATCH 04/15] ARM: dts: Add DMC bus freqeuncy for exynos3250-rinato/monk Chanwoo Choi 2015-11-26 13:47 ` [RFC PATCH 05/15] PM / devfreq: Add new passive governor Chanwoo Choi 2015-11-26 13:47 ` Chanwoo Choi 2015-11-26 13:47 ` [RFC PATCH 06/15] PM / devfreq: Add devfreq_get_devfreq_by_phandle() Chanwoo Choi 2015-11-26 13:47 ` [RFC PATCH 07/15] PM / devfreq: Show the related information according to governor type Chanwoo Choi 2015-11-26 13:47 ` [RFC PATCH 08/15] PM / devfreq: exynos: Add support of bus frequency of sub-blocks using passive governor Chanwoo Choi 2015-11-26 13:47 ` Chanwoo Choi 2015-11-26 13:47 ` [RFC PATCH 09/15] PM / devfreq: exynos: Update documentation for bus devices " Chanwoo Choi 2015-11-30 21:14 ` Rob Herring 2015-12-02 1:41 ` Chanwoo Choi 2015-11-26 13:47 ` [RFC PATCH 10/15] PM / devfreq: exynos: Remove unused exynos4/5 busfreq driver Chanwoo Choi 2015-11-26 13:47 ` Chanwoo Choi [this message] 2015-11-26 13:47 ` [RFC PATCH 11/15] ARM: dts: Add bus nodes using VDD_INT for Exynos3250 Chanwoo Choi 2015-11-26 13:47 ` [RFC PATCH 12/15] ARM: dts: Add support of bus frequency using VDD_INT for exynos3250-rinato Chanwoo Choi 2015-11-26 13:47 ` Chanwoo Choi 2015-11-26 13:47 ` [RFC PATCH 13/15] ARM: dts: Add bus nodes using VDD_MIF for Exynos4x12 Chanwoo Choi 2015-11-26 13:47 ` [RFC PATCH 14/15] ARM: dts: Add bus nodes using VDD_INT " Chanwoo Choi 2015-11-26 13:47 ` Chanwoo Choi 2015-11-26 13:47 ` [RFC PATCH 15/15] ARM: dts: Add support of bus frequency for exynos4412-trats Chanwoo Choi
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