From: Gerd Hoffmann <kraxel@redhat.com> To: qemu-devel@nongnu.org Cc: igvt-g@ml01.01.org, xen-devel@lists.xensource.com, Eduardo Habkost <ehabkost@redhat.com>, Stefano Stabellini <stefano.stabellini@eu.citrix.com>, "Michael S. Tsirkin" <mst@redhat.com>, Cao jin <caoj.fnst@cn.fujitsu.com>, vfio-users@redhat.com, Gerd Hoffmann <kraxel@redhat.com> Subject: [Qemu-devel] [PATCH v3 10/11] igd: handle igd-passthrough-isa-bridge setup in realize() Date: Tue, 5 Jan 2016 12:41:37 +0100 [thread overview] Message-ID: <1451994098-6972-11-git-send-email-kraxel@redhat.com> (raw) In-Reply-To: <1451994098-6972-1-git-send-email-kraxel@redhat.com> That way a simple '-device igd-passthrough-isa-bridge,addr=1f' will do the setup. Also instead of looking up reasonable PCI IDs based on the graphic device id simply copy over the ids from the host, thereby reusing the infrastructure we have in place for the igd host bridges. Less code, and should be more robust as we don't have to maintain the id table to keep things going. Signed-off-by: Gerd Hoffmann <kraxel@redhat.com> --- hw/pci-host/igd.c | 115 +++++++++++++-------------------------------------- hw/xen/xen_pt.c | 2 +- include/hw/i386/pc.h | 2 +- 3 files changed, 30 insertions(+), 89 deletions(-) diff --git a/hw/pci-host/igd.c b/hw/pci-host/igd.c index 96b679d..8f32c39 100644 --- a/hw/pci-host/igd.c +++ b/hw/pci-host/igd.c @@ -123,111 +123,52 @@ static const TypeInfo igd_passthrough_q35_info = { .class_init = igd_passthrough_q35_class_init, }; -typedef struct { - uint16_t gpu_device_id; - uint16_t pch_device_id; - uint8_t pch_revision_id; -} IGDDeviceIDInfo; - -/* In real world different GPU should have different PCH. But actually - * the different PCH DIDs likely map to different PCH SKUs. We do the - * same thing for the GPU. For PCH, the different SKUs are going to be - * all the same silicon design and implementation, just different - * features turn on and off with fuses. The SW interfaces should be - * consistent across all SKUs in a given family (eg LPT). But just same - * features may not be supported. - * - * Most of these different PCH features probably don't matter to the - * Gfx driver, but obviously any difference in display port connections - * will so it should be fine with any PCH in case of passthrough. - * - * So currently use one PCH version, 0x8c4e, to cover all HSW(Haswell) - * scenarios, 0x9cc3 for BDW(Broadwell). - */ -static const IGDDeviceIDInfo igd_combo_id_infos[] = { - /* HSW Classic */ - {0x0402, 0x8c4e, 0x04}, /* HSWGT1D, HSWD_w7 */ - {0x0406, 0x8c4e, 0x04}, /* HSWGT1M, HSWM_w7 */ - {0x0412, 0x8c4e, 0x04}, /* HSWGT2D, HSWD_w7 */ - {0x0416, 0x8c4e, 0x04}, /* HSWGT2M, HSWM_w7 */ - {0x041E, 0x8c4e, 0x04}, /* HSWGT15D, HSWD_w7 */ - /* HSW ULT */ - {0x0A06, 0x8c4e, 0x04}, /* HSWGT1UT, HSWM_w7 */ - {0x0A16, 0x8c4e, 0x04}, /* HSWGT2UT, HSWM_w7 */ - {0x0A26, 0x8c4e, 0x06}, /* HSWGT3UT, HSWM_w7 */ - {0x0A2E, 0x8c4e, 0x04}, /* HSWGT3UT28W, HSWM_w7 */ - {0x0A1E, 0x8c4e, 0x04}, /* HSWGT2UX, HSWM_w7 */ - {0x0A0E, 0x8c4e, 0x04}, /* HSWGT1ULX, HSWM_w7 */ - /* HSW CRW */ - {0x0D26, 0x8c4e, 0x04}, /* HSWGT3CW, HSWM_w7 */ - {0x0D22, 0x8c4e, 0x04}, /* HSWGT3CWDT, HSWD_w7 */ - /* HSW Server */ - {0x041A, 0x8c4e, 0x04}, /* HSWSVGT2, HSWD_w7 */ - /* HSW SRVR */ - {0x040A, 0x8c4e, 0x04}, /* HSWSVGT1, HSWD_w7 */ - /* BSW */ - {0x1606, 0x9cc3, 0x03}, /* BDWULTGT1, BDWM_w7 */ - {0x1616, 0x9cc3, 0x03}, /* BDWULTGT2, BDWM_w7 */ - {0x1626, 0x9cc3, 0x03}, /* BDWULTGT3, BDWM_w7 */ - {0x160E, 0x9cc3, 0x03}, /* BDWULXGT1, BDWM_w7 */ - {0x161E, 0x9cc3, 0x03}, /* BDWULXGT2, BDWM_w7 */ - {0x1602, 0x9cc3, 0x03}, /* BDWHALOGT1, BDWM_w7 */ - {0x1612, 0x9cc3, 0x03}, /* BDWHALOGT2, BDWM_w7 */ - {0x1622, 0x9cc3, 0x03}, /* BDWHALOGT3, BDWM_w7 */ - {0x162B, 0x9cc3, 0x03}, /* BDWHALO28W, BDWM_w7 */ - {0x162A, 0x9cc3, 0x03}, /* BDWGT3WRKS, BDWM_w7 */ - {0x162D, 0x9cc3, 0x03}, /* BDWGT3SRVR, BDWM_w7 */ +static const IGDHostInfo igd_isa_bridge_infos[] = { + {PCI_VENDOR_ID, 2}, + {PCI_DEVICE_ID, 2}, + {PCI_REVISION_ID, 2}, + {PCI_SUBSYSTEM_VENDOR_ID, 2}, + {PCI_SUBSYSTEM_ID, 2}, }; +static void igd_pt_isa_bridge_realize(PCIDevice *pci_dev, Error **errp) +{ + Error *err = NULL; + + if (pci_dev->devfn != PCI_DEVFN(0x1f, 0)) { + error_setg(errp, "igd isa bridge must have address 1f.0"); + return; + } + + host_pci_config_copy(pci_dev, "0000:00:1f.0", + igd_isa_bridge_infos, + ARRAY_SIZE(igd_isa_bridge_infos), + &err); + if (err != NULL) { + error_propagate(errp, err); + return; + } +} + static void isa_bridge_class_init(ObjectClass *klass, void *data) { DeviceClass *dc = DEVICE_CLASS(klass); PCIDeviceClass *k = PCI_DEVICE_CLASS(klass); dc->desc = "ISA bridge faked to support IGD PT"; - k->vendor_id = PCI_VENDOR_ID_INTEL; + k->realize = igd_pt_isa_bridge_realize; k->class_id = PCI_CLASS_BRIDGE_ISA; }; static TypeInfo igd_passthrough_isa_bridge_info = { .name = "igd-passthrough-isa-bridge", .parent = TYPE_PCI_DEVICE, - .instance_size = sizeof(PCIDevice), .class_init = isa_bridge_class_init, }; -void igd_passthrough_isa_bridge_create(PCIBus *bus, uint16_t gpu_dev_id) +void igd_passthrough_isa_bridge_create(PCIBus *bus) { - struct PCIDevice *bridge_dev; - int i, num; - uint16_t pch_dev_id = 0xffff; - uint8_t pch_rev_id; - - num = ARRAY_SIZE(igd_combo_id_infos); - for (i = 0; i < num; i++) { - if (gpu_dev_id == igd_combo_id_infos[i].gpu_device_id) { - pch_dev_id = igd_combo_id_infos[i].pch_device_id; - pch_rev_id = igd_combo_id_infos[i].pch_revision_id; - } - } - - if (pch_dev_id == 0xffff) { - return; - } - - /* Currently IGD drivers always need to access PCH by 1f.0. */ - bridge_dev = pci_create_simple(bus, PCI_DEVFN(0x1f, 0), - "igd-passthrough-isa-bridge"); - - /* - * Note that vendor id is always PCI_VENDOR_ID_INTEL. - */ - if (!bridge_dev) { - fprintf(stderr, "set igd-passthrough-isa-bridge failed!\n"); - return; - } - pci_config_set_device_id(bridge_dev->config, pch_dev_id); - pci_config_set_revision(bridge_dev->config, pch_rev_id); + pci_create_simple(bus, PCI_DEVFN(0x1f, 0), "igd-passthrough-isa-bridge"); } static void igd_register_types(void) diff --git a/hw/xen/xen_pt.c b/hw/xen/xen_pt.c index aa96288..18a7f72 100644 --- a/hw/xen/xen_pt.c +++ b/hw/xen/xen_pt.c @@ -693,7 +693,7 @@ xen_igd_passthrough_isa_bridge_create(XenPCIPassthroughState *s, PCIDevice *d = &s->dev; gpu_dev_id = dev->device_id; - igd_passthrough_isa_bridge_create(d->bus, gpu_dev_id); + igd_passthrough_isa_bridge_create(d->bus); } /* destroy. */ diff --git a/include/hw/i386/pc.h b/include/hw/i386/pc.h index b0d6283..48cdd03 100644 --- a/include/hw/i386/pc.h +++ b/include/hw/i386/pc.h @@ -863,5 +863,5 @@ bool e820_get_entry(int, uint32_t, uint64_t *, uint64_t *); (m)->compat_props = props; \ } while (0) -extern void igd_passthrough_isa_bridge_create(PCIBus *bus, uint16_t gpu_dev_id); +extern void igd_passthrough_isa_bridge_create(PCIBus *bus); #endif -- 1.8.3.1
WARNING: multiple messages have this Message-ID (diff)
From: Gerd Hoffmann <kraxel-H+wXaHxf7aLQT0dZR+AlfA@public.gmane.org> To: qemu-devel-qX2TKyscuCcdnm+yROfE0A@public.gmane.org Cc: igvt-g-y27Ovi1pjclAfugRpC6u6w@public.gmane.org, xen-devel-GuqFBffKawuULHF6PoxzQEEOCMrvLtNR@public.gmane.org, Eduardo Habkost <ehabkost-H+wXaHxf7aLQT0dZR+AlfA@public.gmane.org>, Stefano Stabellini <stefano.stabellini-mvvWK6WmYclDPfheJLI6IQ@public.gmane.org>, "Michael S. Tsirkin" <mst-H+wXaHxf7aLQT0dZR+AlfA@public.gmane.org>, Cao jin <caoj.fnst-BthXqXjhjHXQFUHtdCDX3A@public.gmane.org>, vfio-users-H+wXaHxf7aLQT0dZR+AlfA@public.gmane.org Subject: [PATCH v3 10/11] igd: handle igd-passthrough-isa-bridge setup in realize() Date: Tue, 5 Jan 2016 12:41:37 +0100 [thread overview] Message-ID: <1451994098-6972-11-git-send-email-kraxel@redhat.com> (raw) In-Reply-To: <1451994098-6972-1-git-send-email-kraxel-H+wXaHxf7aLQT0dZR+AlfA@public.gmane.org> That way a simple '-device igd-passthrough-isa-bridge,addr=1f' will do the setup. Also instead of looking up reasonable PCI IDs based on the graphic device id simply copy over the ids from the host, thereby reusing the infrastructure we have in place for the igd host bridges. Less code, and should be more robust as we don't have to maintain the id table to keep things going. Signed-off-by: Gerd Hoffmann <kraxel-H+wXaHxf7aLQT0dZR+AlfA@public.gmane.org> --- hw/pci-host/igd.c | 115 +++++++++++++-------------------------------------- hw/xen/xen_pt.c | 2 +- include/hw/i386/pc.h | 2 +- 3 files changed, 30 insertions(+), 89 deletions(-) diff --git a/hw/pci-host/igd.c b/hw/pci-host/igd.c index 96b679d..8f32c39 100644 --- a/hw/pci-host/igd.c +++ b/hw/pci-host/igd.c @@ -123,111 +123,52 @@ static const TypeInfo igd_passthrough_q35_info = { .class_init = igd_passthrough_q35_class_init, }; -typedef struct { - uint16_t gpu_device_id; - uint16_t pch_device_id; - uint8_t pch_revision_id; -} IGDDeviceIDInfo; - -/* In real world different GPU should have different PCH. But actually - * the different PCH DIDs likely map to different PCH SKUs. We do the - * same thing for the GPU. For PCH, the different SKUs are going to be - * all the same silicon design and implementation, just different - * features turn on and off with fuses. The SW interfaces should be - * consistent across all SKUs in a given family (eg LPT). But just same - * features may not be supported. - * - * Most of these different PCH features probably don't matter to the - * Gfx driver, but obviously any difference in display port connections - * will so it should be fine with any PCH in case of passthrough. - * - * So currently use one PCH version, 0x8c4e, to cover all HSW(Haswell) - * scenarios, 0x9cc3 for BDW(Broadwell). - */ -static const IGDDeviceIDInfo igd_combo_id_infos[] = { - /* HSW Classic */ - {0x0402, 0x8c4e, 0x04}, /* HSWGT1D, HSWD_w7 */ - {0x0406, 0x8c4e, 0x04}, /* HSWGT1M, HSWM_w7 */ - {0x0412, 0x8c4e, 0x04}, /* HSWGT2D, HSWD_w7 */ - {0x0416, 0x8c4e, 0x04}, /* HSWGT2M, HSWM_w7 */ - {0x041E, 0x8c4e, 0x04}, /* HSWGT15D, HSWD_w7 */ - /* HSW ULT */ - {0x0A06, 0x8c4e, 0x04}, /* HSWGT1UT, HSWM_w7 */ - {0x0A16, 0x8c4e, 0x04}, /* HSWGT2UT, HSWM_w7 */ - {0x0A26, 0x8c4e, 0x06}, /* HSWGT3UT, HSWM_w7 */ - {0x0A2E, 0x8c4e, 0x04}, /* HSWGT3UT28W, HSWM_w7 */ - {0x0A1E, 0x8c4e, 0x04}, /* HSWGT2UX, HSWM_w7 */ - {0x0A0E, 0x8c4e, 0x04}, /* HSWGT1ULX, HSWM_w7 */ - /* HSW CRW */ - {0x0D26, 0x8c4e, 0x04}, /* HSWGT3CW, HSWM_w7 */ - {0x0D22, 0x8c4e, 0x04}, /* HSWGT3CWDT, HSWD_w7 */ - /* HSW Server */ - {0x041A, 0x8c4e, 0x04}, /* HSWSVGT2, HSWD_w7 */ - /* HSW SRVR */ - {0x040A, 0x8c4e, 0x04}, /* HSWSVGT1, HSWD_w7 */ - /* BSW */ - {0x1606, 0x9cc3, 0x03}, /* BDWULTGT1, BDWM_w7 */ - {0x1616, 0x9cc3, 0x03}, /* BDWULTGT2, BDWM_w7 */ - {0x1626, 0x9cc3, 0x03}, /* BDWULTGT3, BDWM_w7 */ - {0x160E, 0x9cc3, 0x03}, /* BDWULXGT1, BDWM_w7 */ - {0x161E, 0x9cc3, 0x03}, /* BDWULXGT2, BDWM_w7 */ - {0x1602, 0x9cc3, 0x03}, /* BDWHALOGT1, BDWM_w7 */ - {0x1612, 0x9cc3, 0x03}, /* BDWHALOGT2, BDWM_w7 */ - {0x1622, 0x9cc3, 0x03}, /* BDWHALOGT3, BDWM_w7 */ - {0x162B, 0x9cc3, 0x03}, /* BDWHALO28W, BDWM_w7 */ - {0x162A, 0x9cc3, 0x03}, /* BDWGT3WRKS, BDWM_w7 */ - {0x162D, 0x9cc3, 0x03}, /* BDWGT3SRVR, BDWM_w7 */ +static const IGDHostInfo igd_isa_bridge_infos[] = { + {PCI_VENDOR_ID, 2}, + {PCI_DEVICE_ID, 2}, + {PCI_REVISION_ID, 2}, + {PCI_SUBSYSTEM_VENDOR_ID, 2}, + {PCI_SUBSYSTEM_ID, 2}, }; +static void igd_pt_isa_bridge_realize(PCIDevice *pci_dev, Error **errp) +{ + Error *err = NULL; + + if (pci_dev->devfn != PCI_DEVFN(0x1f, 0)) { + error_setg(errp, "igd isa bridge must have address 1f.0"); + return; + } + + host_pci_config_copy(pci_dev, "0000:00:1f.0", + igd_isa_bridge_infos, + ARRAY_SIZE(igd_isa_bridge_infos), + &err); + if (err != NULL) { + error_propagate(errp, err); + return; + } +} + static void isa_bridge_class_init(ObjectClass *klass, void *data) { DeviceClass *dc = DEVICE_CLASS(klass); PCIDeviceClass *k = PCI_DEVICE_CLASS(klass); dc->desc = "ISA bridge faked to support IGD PT"; - k->vendor_id = PCI_VENDOR_ID_INTEL; + k->realize = igd_pt_isa_bridge_realize; k->class_id = PCI_CLASS_BRIDGE_ISA; }; static TypeInfo igd_passthrough_isa_bridge_info = { .name = "igd-passthrough-isa-bridge", .parent = TYPE_PCI_DEVICE, - .instance_size = sizeof(PCIDevice), .class_init = isa_bridge_class_init, }; -void igd_passthrough_isa_bridge_create(PCIBus *bus, uint16_t gpu_dev_id) +void igd_passthrough_isa_bridge_create(PCIBus *bus) { - struct PCIDevice *bridge_dev; - int i, num; - uint16_t pch_dev_id = 0xffff; - uint8_t pch_rev_id; - - num = ARRAY_SIZE(igd_combo_id_infos); - for (i = 0; i < num; i++) { - if (gpu_dev_id == igd_combo_id_infos[i].gpu_device_id) { - pch_dev_id = igd_combo_id_infos[i].pch_device_id; - pch_rev_id = igd_combo_id_infos[i].pch_revision_id; - } - } - - if (pch_dev_id == 0xffff) { - return; - } - - /* Currently IGD drivers always need to access PCH by 1f.0. */ - bridge_dev = pci_create_simple(bus, PCI_DEVFN(0x1f, 0), - "igd-passthrough-isa-bridge"); - - /* - * Note that vendor id is always PCI_VENDOR_ID_INTEL. - */ - if (!bridge_dev) { - fprintf(stderr, "set igd-passthrough-isa-bridge failed!\n"); - return; - } - pci_config_set_device_id(bridge_dev->config, pch_dev_id); - pci_config_set_revision(bridge_dev->config, pch_rev_id); + pci_create_simple(bus, PCI_DEVFN(0x1f, 0), "igd-passthrough-isa-bridge"); } static void igd_register_types(void) diff --git a/hw/xen/xen_pt.c b/hw/xen/xen_pt.c index aa96288..18a7f72 100644 --- a/hw/xen/xen_pt.c +++ b/hw/xen/xen_pt.c @@ -693,7 +693,7 @@ xen_igd_passthrough_isa_bridge_create(XenPCIPassthroughState *s, PCIDevice *d = &s->dev; gpu_dev_id = dev->device_id; - igd_passthrough_isa_bridge_create(d->bus, gpu_dev_id); + igd_passthrough_isa_bridge_create(d->bus); } /* destroy. */ diff --git a/include/hw/i386/pc.h b/include/hw/i386/pc.h index b0d6283..48cdd03 100644 --- a/include/hw/i386/pc.h +++ b/include/hw/i386/pc.h @@ -863,5 +863,5 @@ bool e820_get_entry(int, uint32_t, uint64_t *, uint64_t *); (m)->compat_props = props; \ } while (0) -extern void igd_passthrough_isa_bridge_create(PCIBus *bus, uint16_t gpu_dev_id); +extern void igd_passthrough_isa_bridge_create(PCIBus *bus); #endif -- 1.8.3.1
next prev parent reply other threads:[~2016-01-05 11:42 UTC|newest] Thread overview: 132+ messages / expand[flat|nested] mbox.gz Atom feed top 2016-01-05 11:41 [Qemu-devel] [PATCH v3 00/11] igd passthrough chipset tweaks Gerd Hoffmann 2016-01-05 11:41 ` Gerd Hoffmann 2016-01-05 11:41 ` [Qemu-devel] [PATCH v3 01/11] pc: wire up TYPE_IGD_PASSTHROUGH_I440FX_PCI_DEVICE for !xen Gerd Hoffmann 2016-01-05 11:41 ` Gerd Hoffmann 2016-01-05 11:41 ` [Qemu-devel] [PATCH v3 02/11] pc: remove has_igd_gfx_passthru global Gerd Hoffmann 2016-01-05 11:41 ` Gerd Hoffmann 2016-01-06 14:32 ` [Qemu-devel] [Xen-devel] " Stefano Stabellini 2016-01-06 14:32 ` Stefano Stabellini 2016-01-19 15:09 ` [Qemu-devel] " Eduardo Habkost 2016-01-19 15:09 ` Eduardo Habkost 2016-01-05 11:41 ` [Qemu-devel] [PATCH v3 03/11] pc: move igd support code to igd.c Gerd Hoffmann 2016-01-05 11:41 ` Gerd Hoffmann 2016-01-05 11:41 ` [Qemu-devel] [PATCH v3 04/11] igd: switch TYPE_IGD_PASSTHROUGH_I440FX_PCI_DEVICE to realize Gerd Hoffmann 2016-01-05 11:41 ` Gerd Hoffmann 2016-01-06 14:32 ` [Qemu-devel] " Stefano Stabellini 2016-01-06 14:32 ` Stefano Stabellini 2016-01-23 14:51 ` [Qemu-devel] " Eduardo Habkost 2016-01-23 14:51 ` Eduardo Habkost 2016-01-25 8:59 ` [Qemu-devel] " Gerd Hoffmann 2016-01-25 8:59 ` Gerd Hoffmann 2016-01-25 11:53 ` [Qemu-devel] " Stefano Stabellini 2016-01-25 11:53 ` Stefano Stabellini 2016-01-05 11:41 ` [Qemu-devel] [PATCH v3 05/11] igd: TYPE_IGD_PASSTHROUGH_I440FX_PCI_DEVICE: call parent realize Gerd Hoffmann 2016-01-05 11:41 ` Gerd Hoffmann 2016-01-06 14:41 ` [Qemu-devel] " Stefano Stabellini 2016-01-06 14:41 ` Stefano Stabellini 2016-01-06 15:45 ` [Qemu-devel] " Gerd Hoffmann 2016-01-06 15:45 ` Gerd Hoffmann 2016-01-19 15:13 ` [Qemu-devel] " Eduardo Habkost 2016-01-19 15:13 ` Eduardo Habkost 2016-01-20 9:10 ` [Qemu-devel] " Gerd Hoffmann 2016-01-20 9:10 ` Gerd Hoffmann 2016-01-23 14:52 ` [Qemu-devel] " Eduardo Habkost 2016-01-23 14:52 ` Eduardo Habkost 2016-01-05 11:41 ` [Qemu-devel] [PATCH v3 06/11] igd: use defines for standard pci config space offsets Gerd Hoffmann 2016-01-05 11:41 ` Gerd Hoffmann 2016-01-06 14:43 ` [Qemu-devel] " Stefano Stabellini 2016-01-06 14:43 ` Stefano Stabellini 2016-01-05 11:41 ` [Qemu-devel] [PATCH v3 07/11] igd: revamp host config read Gerd Hoffmann 2016-01-05 11:41 ` Gerd Hoffmann 2016-01-06 15:02 ` [Qemu-devel] " Stefano Stabellini 2016-01-06 15:02 ` Stefano Stabellini 2016-01-06 15:51 ` [Qemu-devel] " Gerd Hoffmann 2016-01-06 15:51 ` Gerd Hoffmann 2016-01-06 16:23 ` [Qemu-devel] [Xen-devel] " Stefano Stabellini 2016-01-06 16:23 ` Stefano Stabellini 2016-01-05 11:41 ` [Qemu-devel] [PATCH v3 08/11] igd: add q35 support Gerd Hoffmann 2016-01-05 11:41 ` Gerd Hoffmann 2016-01-05 11:41 ` [Qemu-devel] [PATCH v3 09/11] igd: move igd-passthrough-isa-bridge to igd.c too Gerd Hoffmann 2016-01-05 11:41 ` Gerd Hoffmann 2016-01-05 11:41 ` Gerd Hoffmann [this message] 2016-01-05 11:41 ` [PATCH v3 10/11] igd: handle igd-passthrough-isa-bridge setup in realize() Gerd Hoffmann 2016-01-06 15:29 ` [Qemu-devel] " Stefano Stabellini 2016-01-06 15:29 ` Stefano Stabellini 2016-01-06 15:52 ` [Qemu-devel] " Gerd Hoffmann 2016-01-06 15:52 ` Gerd Hoffmann 2016-01-05 11:41 ` [Qemu-devel] [PATCH v3 11/11] igd: move igd-passthrough-isa-bridge creation to machine init Gerd Hoffmann 2016-01-05 11:41 ` Gerd Hoffmann 2016-01-06 15:36 ` [Qemu-devel] " Stefano Stabellini 2016-01-06 15:36 ` Stefano Stabellini 2016-01-07 7:38 ` [Qemu-devel] " Gerd Hoffmann 2016-01-07 7:38 ` Gerd Hoffmann 2016-01-07 13:10 ` [Qemu-devel] " Stefano Stabellini 2016-01-07 13:10 ` Stefano Stabellini 2016-01-07 15:50 ` [Qemu-devel] " Gerd Hoffmann 2016-01-07 15:50 ` Gerd Hoffmann 2016-01-08 11:20 ` Stefano Stabellini 2016-01-08 11:20 ` Stefano Stabellini 2016-01-08 12:12 ` [Qemu-devel] " Stefano Stabellini 2016-01-08 12:12 ` Stefano Stabellini 2016-01-08 12:32 ` Gerd Hoffmann 2016-01-08 12:32 ` Gerd Hoffmann 2016-01-08 12:38 ` [Qemu-devel] " Stefano Stabellini 2016-01-08 12:38 ` Stefano Stabellini 2016-01-05 13:07 ` [Qemu-devel] [PATCH v3 00/11] igd passthrough chipset tweaks Michael S. Tsirkin 2016-01-05 13:07 ` Michael S. Tsirkin 2016-01-28 19:35 ` [Qemu-devel] [vfio-users] " Alex Williamson 2016-01-28 19:35 ` Alex Williamson 2016-01-29 2:22 ` [Qemu-devel] [iGVT-g] " Kay, Allen M 2016-01-29 2:22 ` Kay, Allen M 2016-01-29 2:54 ` [Qemu-devel] " Alex Williamson 2016-01-29 2:54 ` Alex Williamson 2016-01-29 6:21 ` [Qemu-devel] " Jike Song 2016-01-29 6:21 ` Jike Song 2016-01-29 21:58 ` [Qemu-devel] " Kay, Allen M 2016-01-29 21:58 ` Kay, Allen M 2016-02-02 7:07 ` [Qemu-devel] " Tian, Kevin 2016-02-02 7:07 ` Tian, Kevin 2016-02-02 19:10 ` [Qemu-devel] " Kay, Allen M 2016-02-02 19:10 ` [iGVT-g] " Kay, Allen M 2016-02-02 19:37 ` [Qemu-devel] [iGVT-g] [vfio-users] " Alex Williamson 2016-02-02 19:37 ` Alex Williamson 2016-02-02 23:32 ` [Qemu-devel] " Kay, Allen M 2016-02-02 23:32 ` Kay, Allen M 2016-01-29 7:09 ` [Qemu-devel] " Gerd Hoffmann 2016-01-29 7:09 ` Gerd Hoffmann 2016-01-29 17:59 ` [Qemu-devel] " Alex Williamson 2016-01-29 17:59 ` Alex Williamson 2016-01-30 1:18 ` [Qemu-devel] [iGVT-g] " Kay, Allen M 2016-01-30 1:18 ` Kay, Allen M 2016-01-31 17:42 ` [Qemu-devel] " Alex Williamson 2016-01-31 17:42 ` Alex Williamson 2016-02-02 0:04 ` [Qemu-devel] " Kay, Allen M 2016-02-02 0:04 ` Kay, Allen M 2016-02-02 6:42 ` [Qemu-devel] [Xen-devel] " Tian, Kevin 2016-02-02 6:42 ` Tian, Kevin 2016-02-02 11:50 ` [Qemu-devel] " David Woodhouse 2016-02-02 11:50 ` David Woodhouse 2016-02-02 14:54 ` [Qemu-devel] " Alex Williamson 2016-02-02 14:54 ` Alex Williamson 2016-02-02 15:06 ` [Qemu-devel] " David Woodhouse 2016-02-02 15:06 ` David Woodhouse 2016-02-02 14:38 ` [Qemu-devel] " Alex Williamson 2016-02-02 14:38 ` Alex Williamson 2016-02-01 12:49 ` [Qemu-devel] " Gerd Hoffmann 2016-02-01 12:49 ` Gerd Hoffmann 2016-02-01 22:16 ` [Qemu-devel] " Alex Williamson 2016-02-01 22:16 ` Alex Williamson 2016-02-02 7:43 ` [Qemu-devel] [vfio-users] " Gerd Hoffmann 2016-02-02 7:43 ` Gerd Hoffmann 2016-02-02 7:01 ` [Qemu-devel] [iGVT-g] " Tian, Kevin 2016-02-02 7:01 ` [iGVT-g] " Tian, Kevin 2016-02-02 8:56 ` [Qemu-devel] [iGVT-g] [vfio-users] " Gerd Hoffmann 2016-02-02 8:56 ` Gerd Hoffmann 2016-02-02 16:31 ` [Qemu-devel] " Kevin O'Connor 2016-02-02 16:31 ` Kevin O'Connor 2016-02-02 16:49 ` [Qemu-devel] " Laszlo Ersek 2016-02-02 16:49 ` Laszlo Ersek 2016-02-02 20:18 ` [Qemu-devel] " Alex Williamson 2016-02-02 20:18 ` Alex Williamson 2016-02-03 6:08 ` [Qemu-devel] " Tian, Kevin 2016-02-03 6:08 ` Tian, Kevin
Reply instructions: You may reply publicly to this message via plain-text email using any one of the following methods: * Save the following mbox file, import it into your mail client, and reply-to-all from there: mbox Avoid top-posting and favor interleaved quoting: https://en.wikipedia.org/wiki/Posting_style#Interleaved_style * Reply using the --to, --cc, and --in-reply-to switches of git-send-email(1): git send-email \ --in-reply-to=1451994098-6972-11-git-send-email-kraxel@redhat.com \ --to=kraxel@redhat.com \ --cc=caoj.fnst@cn.fujitsu.com \ --cc=ehabkost@redhat.com \ --cc=igvt-g@ml01.01.org \ --cc=mst@redhat.com \ --cc=qemu-devel@nongnu.org \ --cc=stefano.stabellini@eu.citrix.com \ --cc=vfio-users@redhat.com \ --cc=xen-devel@lists.xensource.com \ /path/to/YOUR_REPLY https://kernel.org/pub/software/scm/git/docs/git-send-email.html * If your mail client supports setting the In-Reply-To header via mailto: links, try the mailto: linkBe sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes, see mirroring instructions on how to clone and mirror all data and code used by this external index.