From: Geert Uytterhoeven <geert+renesas@glider.be> To: Simon Horman <horms@verge.net.au>, Magnus Damm <magnus.damm@gmail.com> Cc: linux-renesas-soc@vger.kernel.org, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, Geert Uytterhoeven <geert+renesas@glider.be> Subject: [PATCH v4 6/7] ARM: dts: r8a7794: Add BRG support for (H)SCIF Date: Fri, 29 Jan 2016 11:04:42 +0100 [thread overview] Message-ID: <1454061883-4043-7-git-send-email-geert+renesas@glider.be> (raw) In-Reply-To: <1454061883-4043-1-git-send-email-geert+renesas@glider.be> Add the device node for the external SCIF_CLK. The presence of the SCIF_CLK crystal and its clock frequency depends on the actual board. Add the two optional clock sources (ZS_CLK and SCIF_CLK for the internal resp. external clock) for the Baud Rate Generator for External Clock (BRG) to all SCIF and HSCIF device nodes. This increases the range and accuracy of supported baud rates on (H)SCIF. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> --- v4: - Change one-line summary prefix to match current arm-soc practices, v3: - New. --- arch/arm/boot/dts/r8a7794.dtsi | 54 ++++++++++++++++++++++++++++-------------- 1 file changed, 36 insertions(+), 18 deletions(-) diff --git a/arch/arm/boot/dts/r8a7794.dtsi b/arch/arm/boot/dts/r8a7794.dtsi index b03a77b3d22f13d2..7d4c5597af5b54bd 100644 --- a/arch/arm/boot/dts/r8a7794.dtsi +++ b/arch/arm/boot/dts/r8a7794.dtsi @@ -403,8 +403,9 @@ "renesas,scif"; reg = <0 0xe6e60000 0 64>; interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&mstp7_clks R8A7794_CLK_SCIF0>; - clock-names = "fck"; + clocks = <&mstp7_clks R8A7794_CLK_SCIF0>, <&zs_clk>, + <&scif_clk>; + clock-names = "fck", "brg_int", "scif_clk"; dmas = <&dmac0 0x29>, <&dmac0 0x2a>; dma-names = "tx", "rx"; power-domains = <&cpg_clocks>; @@ -416,8 +417,9 @@ "renesas,scif"; reg = <0 0xe6e68000 0 64>; interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&mstp7_clks R8A7794_CLK_SCIF1>; - clock-names = "fck"; + clocks = <&mstp7_clks R8A7794_CLK_SCIF1>, <&zs_clk>, + <&scif_clk>; + clock-names = "fck", "brg_int", "scif_clk"; dmas = <&dmac0 0x2d>, <&dmac0 0x2e>; dma-names = "tx", "rx"; power-domains = <&cpg_clocks>; @@ -429,8 +431,9 @@ "renesas,scif"; reg = <0 0xe6e58000 0 64>; interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&mstp7_clks R8A7794_CLK_SCIF2>; - clock-names = "fck"; + clocks = <&mstp7_clks R8A7794_CLK_SCIF2>, <&zs_clk>, + <&scif_clk>; + clock-names = "fck", "brg_int", "scif_clk"; dmas = <&dmac0 0x2b>, <&dmac0 0x2c>; dma-names = "tx", "rx"; power-domains = <&cpg_clocks>; @@ -442,8 +445,9 @@ "renesas,scif"; reg = <0 0xe6ea8000 0 64>; interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&mstp7_clks R8A7794_CLK_SCIF3>; - clock-names = "fck"; + clocks = <&mstp7_clks R8A7794_CLK_SCIF3>, <&zs_clk>, + <&scif_clk>; + clock-names = "fck", "brg_int", "scif_clk"; dmas = <&dmac0 0x2f>, <&dmac0 0x30>; dma-names = "tx", "rx"; power-domains = <&cpg_clocks>; @@ -455,8 +459,9 @@ "renesas,scif"; reg = <0 0xe6ee0000 0 64>; interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&mstp7_clks R8A7794_CLK_SCIF4>; - clock-names = "fck"; + clocks = <&mstp7_clks R8A7794_CLK_SCIF4>, <&zs_clk>, + <&scif_clk>; + clock-names = "fck", "brg_int", "scif_clk"; dmas = <&dmac0 0xfb>, <&dmac0 0xfc>; dma-names = "tx", "rx"; power-domains = <&cpg_clocks>; @@ -468,8 +473,9 @@ "renesas,scif"; reg = <0 0xe6ee8000 0 64>; interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&mstp7_clks R8A7794_CLK_SCIF5>; - clock-names = "fck"; + clocks = <&mstp7_clks R8A7794_CLK_SCIF5>, <&zs_clk>, + <&scif_clk>; + clock-names = "fck", "brg_int", "scif_clk"; dmas = <&dmac0 0xfd>, <&dmac0 0xfe>; dma-names = "tx", "rx"; power-domains = <&cpg_clocks>; @@ -481,8 +487,9 @@ "renesas,rcar-gen2-hscif", "renesas,hscif"; reg = <0 0xe62c0000 0 96>; interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&mstp7_clks R8A7794_CLK_HSCIF0>; - clock-names = "fck"; + clocks = <&mstp7_clks R8A7794_CLK_HSCIF0>, <&zs_clk>, + <&scif_clk>; + clock-names = "fck", "brg_int", "scif_clk"; dmas = <&dmac0 0x39>, <&dmac0 0x3a>; dma-names = "tx", "rx"; power-domains = <&cpg_clocks>; @@ -494,8 +501,9 @@ "renesas,rcar-gen2-hscif", "renesas,hscif"; reg = <0 0xe62c8000 0 96>; interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&mstp7_clks R8A7794_CLK_HSCIF1>; - clock-names = "fck"; + clocks = <&mstp7_clks R8A7794_CLK_HSCIF1>, <&zs_clk>, + <&scif_clk>; + clock-names = "fck", "brg_int", "scif_clk"; dmas = <&dmac0 0x4d>, <&dmac0 0x4e>; dma-names = "tx", "rx"; power-domains = <&cpg_clocks>; @@ -507,8 +515,9 @@ "renesas,rcar-gen2-hscif", "renesas,hscif"; reg = <0 0xe62d0000 0 96>; interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&mstp7_clks R8A7794_CLK_HSCIF2>; - clock-names = "fck"; + clocks = <&mstp7_clks R8A7794_CLK_HSCIF2>, <&zs_clk>, + <&scif_clk>; + clock-names = "fck", "brg_int", "scif_clk"; dmas = <&dmac0 0x3b>, <&dmac0 0x3c>; dma-names = "tx", "rx"; power-domains = <&cpg_clocks>; @@ -815,6 +824,15 @@ clock-output-names = "extal"; }; + /* External SCIF clock */ + scif_clk: scif { + compatible = "fixed-clock"; + #clock-cells = <0>; + /* This value must be overridden by the board. */ + clock-frequency = <0>; + status = "disabled"; + }; + /* Special CPG clocks */ cpg_clocks: cpg_clocks@e6150000 { compatible = "renesas,r8a7794-cpg-clocks", -- 1.9.1
WARNING: multiple messages have this Message-ID (diff)
From: geert+renesas@glider.be (Geert Uytterhoeven) To: linux-arm-kernel@lists.infradead.org Subject: [PATCH v4 6/7] ARM: dts: r8a7794: Add BRG support for (H)SCIF Date: Fri, 29 Jan 2016 11:04:42 +0100 [thread overview] Message-ID: <1454061883-4043-7-git-send-email-geert+renesas@glider.be> (raw) In-Reply-To: <1454061883-4043-1-git-send-email-geert+renesas@glider.be> Add the device node for the external SCIF_CLK. The presence of the SCIF_CLK crystal and its clock frequency depends on the actual board. Add the two optional clock sources (ZS_CLK and SCIF_CLK for the internal resp. external clock) for the Baud Rate Generator for External Clock (BRG) to all SCIF and HSCIF device nodes. This increases the range and accuracy of supported baud rates on (H)SCIF. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> --- v4: - Change one-line summary prefix to match current arm-soc practices, v3: - New. --- arch/arm/boot/dts/r8a7794.dtsi | 54 ++++++++++++++++++++++++++++-------------- 1 file changed, 36 insertions(+), 18 deletions(-) diff --git a/arch/arm/boot/dts/r8a7794.dtsi b/arch/arm/boot/dts/r8a7794.dtsi index b03a77b3d22f13d2..7d4c5597af5b54bd 100644 --- a/arch/arm/boot/dts/r8a7794.dtsi +++ b/arch/arm/boot/dts/r8a7794.dtsi @@ -403,8 +403,9 @@ "renesas,scif"; reg = <0 0xe6e60000 0 64>; interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&mstp7_clks R8A7794_CLK_SCIF0>; - clock-names = "fck"; + clocks = <&mstp7_clks R8A7794_CLK_SCIF0>, <&zs_clk>, + <&scif_clk>; + clock-names = "fck", "brg_int", "scif_clk"; dmas = <&dmac0 0x29>, <&dmac0 0x2a>; dma-names = "tx", "rx"; power-domains = <&cpg_clocks>; @@ -416,8 +417,9 @@ "renesas,scif"; reg = <0 0xe6e68000 0 64>; interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&mstp7_clks R8A7794_CLK_SCIF1>; - clock-names = "fck"; + clocks = <&mstp7_clks R8A7794_CLK_SCIF1>, <&zs_clk>, + <&scif_clk>; + clock-names = "fck", "brg_int", "scif_clk"; dmas = <&dmac0 0x2d>, <&dmac0 0x2e>; dma-names = "tx", "rx"; power-domains = <&cpg_clocks>; @@ -429,8 +431,9 @@ "renesas,scif"; reg = <0 0xe6e58000 0 64>; interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&mstp7_clks R8A7794_CLK_SCIF2>; - clock-names = "fck"; + clocks = <&mstp7_clks R8A7794_CLK_SCIF2>, <&zs_clk>, + <&scif_clk>; + clock-names = "fck", "brg_int", "scif_clk"; dmas = <&dmac0 0x2b>, <&dmac0 0x2c>; dma-names = "tx", "rx"; power-domains = <&cpg_clocks>; @@ -442,8 +445,9 @@ "renesas,scif"; reg = <0 0xe6ea8000 0 64>; interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&mstp7_clks R8A7794_CLK_SCIF3>; - clock-names = "fck"; + clocks = <&mstp7_clks R8A7794_CLK_SCIF3>, <&zs_clk>, + <&scif_clk>; + clock-names = "fck", "brg_int", "scif_clk"; dmas = <&dmac0 0x2f>, <&dmac0 0x30>; dma-names = "tx", "rx"; power-domains = <&cpg_clocks>; @@ -455,8 +459,9 @@ "renesas,scif"; reg = <0 0xe6ee0000 0 64>; interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&mstp7_clks R8A7794_CLK_SCIF4>; - clock-names = "fck"; + clocks = <&mstp7_clks R8A7794_CLK_SCIF4>, <&zs_clk>, + <&scif_clk>; + clock-names = "fck", "brg_int", "scif_clk"; dmas = <&dmac0 0xfb>, <&dmac0 0xfc>; dma-names = "tx", "rx"; power-domains = <&cpg_clocks>; @@ -468,8 +473,9 @@ "renesas,scif"; reg = <0 0xe6ee8000 0 64>; interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&mstp7_clks R8A7794_CLK_SCIF5>; - clock-names = "fck"; + clocks = <&mstp7_clks R8A7794_CLK_SCIF5>, <&zs_clk>, + <&scif_clk>; + clock-names = "fck", "brg_int", "scif_clk"; dmas = <&dmac0 0xfd>, <&dmac0 0xfe>; dma-names = "tx", "rx"; power-domains = <&cpg_clocks>; @@ -481,8 +487,9 @@ "renesas,rcar-gen2-hscif", "renesas,hscif"; reg = <0 0xe62c0000 0 96>; interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&mstp7_clks R8A7794_CLK_HSCIF0>; - clock-names = "fck"; + clocks = <&mstp7_clks R8A7794_CLK_HSCIF0>, <&zs_clk>, + <&scif_clk>; + clock-names = "fck", "brg_int", "scif_clk"; dmas = <&dmac0 0x39>, <&dmac0 0x3a>; dma-names = "tx", "rx"; power-domains = <&cpg_clocks>; @@ -494,8 +501,9 @@ "renesas,rcar-gen2-hscif", "renesas,hscif"; reg = <0 0xe62c8000 0 96>; interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&mstp7_clks R8A7794_CLK_HSCIF1>; - clock-names = "fck"; + clocks = <&mstp7_clks R8A7794_CLK_HSCIF1>, <&zs_clk>, + <&scif_clk>; + clock-names = "fck", "brg_int", "scif_clk"; dmas = <&dmac0 0x4d>, <&dmac0 0x4e>; dma-names = "tx", "rx"; power-domains = <&cpg_clocks>; @@ -507,8 +515,9 @@ "renesas,rcar-gen2-hscif", "renesas,hscif"; reg = <0 0xe62d0000 0 96>; interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&mstp7_clks R8A7794_CLK_HSCIF2>; - clock-names = "fck"; + clocks = <&mstp7_clks R8A7794_CLK_HSCIF2>, <&zs_clk>, + <&scif_clk>; + clock-names = "fck", "brg_int", "scif_clk"; dmas = <&dmac0 0x3b>, <&dmac0 0x3c>; dma-names = "tx", "rx"; power-domains = <&cpg_clocks>; @@ -815,6 +824,15 @@ clock-output-names = "extal"; }; + /* External SCIF clock */ + scif_clk: scif { + compatible = "fixed-clock"; + #clock-cells = <0>; + /* This value must be overridden by the board. */ + clock-frequency = <0>; + status = "disabled"; + }; + /* Special CPG clocks */ cpg_clocks: cpg_clocks at e6150000 { compatible = "renesas,r8a7794-cpg-clocks", -- 1.9.1
next prev parent reply other threads:[~2016-01-29 10:04 UTC|newest] Thread overview: 27+ messages / expand[flat|nested] mbox.gz Atom feed top 2016-01-29 10:04 [PATCH v4 0/7] ARM: dts: r-car: Add BRG support for (H)SCIF Geert Uytterhoeven 2016-01-29 10:04 ` Geert Uytterhoeven 2016-01-29 10:04 ` [PATCH v4 1/7] ARM: dts: r8a7778: Add BRG support for SCIF Geert Uytterhoeven 2016-01-29 10:04 ` Geert Uytterhoeven 2016-01-29 10:04 ` [PATCH v4 2/7] ARM: dts: r8a7779: " Geert Uytterhoeven 2016-01-29 10:04 ` Geert Uytterhoeven 2016-01-29 10:04 ` [PATCH v4 3/7] ARM: dts: r8a7790: Add BRG support for (H)SCIF Geert Uytterhoeven 2016-01-29 10:04 ` Geert Uytterhoeven [not found] ` <1454061883-4043-1-git-send-email-geert+renesas-gXvu3+zWzMSzQB+pC5nmwQ@public.gmane.org> 2016-01-29 10:04 ` [PATCH v4 4/7] ARM: dts: r8a7791: " Geert Uytterhoeven 2016-01-29 10:04 ` Geert Uytterhoeven 2016-01-29 10:04 ` Geert Uytterhoeven 2016-01-29 10:04 ` [PATCH v4 7/7] arm64: dts: r8a7795: " Geert Uytterhoeven 2016-01-29 10:04 ` Geert Uytterhoeven 2016-01-29 10:04 ` Geert Uytterhoeven 2016-01-29 10:04 ` [PATCH v4 5/7] ARM: dts: r8a7793: Add BRG support for SCIF Geert Uytterhoeven 2016-01-29 10:04 ` Geert Uytterhoeven 2016-01-29 10:04 ` Geert Uytterhoeven [this message] 2016-01-29 10:04 ` [PATCH v4 6/7] ARM: dts: r8a7794: Add BRG support for (H)SCIF Geert Uytterhoeven 2016-02-02 10:20 ` [PATCH v4 0/7] ARM: dts: r-car: " Simon Horman 2016-02-02 10:20 ` Simon Horman [not found] ` <20160202102031.GD15554-/R6kz+dDXgpPR4JQBCEnsQ@public.gmane.org> 2016-02-02 10:38 ` Geert Uytterhoeven 2016-02-02 10:38 ` Geert Uytterhoeven 2016-02-02 10:38 ` Geert Uytterhoeven 2016-02-02 12:52 ` Simon Horman 2016-02-02 12:52 ` Simon Horman 2016-02-02 12:57 ` Simon Horman 2016-02-02 12:57 ` Simon Horman
Reply instructions: You may reply publicly to this message via plain-text email using any one of the following methods: * Save the following mbox file, import it into your mail client, and reply-to-all from there: mbox Avoid top-posting and favor interleaved quoting: https://en.wikipedia.org/wiki/Posting_style#Interleaved_style * Reply using the --to, --cc, and --in-reply-to switches of git-send-email(1): git send-email \ --in-reply-to=1454061883-4043-7-git-send-email-geert+renesas@glider.be \ --to=geert+renesas@glider.be \ --cc=devicetree@vger.kernel.org \ --cc=horms@verge.net.au \ --cc=linux-arm-kernel@lists.infradead.org \ --cc=linux-renesas-soc@vger.kernel.org \ --cc=magnus.damm@gmail.com \ /path/to/YOUR_REPLY https://kernel.org/pub/software/scm/git/docs/git-send-email.html * If your mail client supports setting the In-Reply-To header via mailto: links, try the mailto: linkBe sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes, see mirroring instructions on how to clone and mirror all data and code used by this external index.