From: David Gibson <david@gibson.dropbear.id.au>
To: benh@kernel.crashing.org, aik@ozlabs.ru, agraf@suse.de
Cc: qemu-ppc@nongnu.org, qemu-devel@nongnu.org,
David Gibson <david@gibson.dropbear.id.au>
Subject: [Qemu-devel] [PATCH 2/6] target-ppc: Include missing MMU models for SDR1 in info registers
Date: Fri, 5 Feb 2016 13:13:55 +1100 [thread overview]
Message-ID: <1454638439-11938-3-git-send-email-david@gibson.dropbear.id.au> (raw)
In-Reply-To: <1454638439-11938-1-git-send-email-david@gibson.dropbear.id.au>
The HMP command "info registers" produces somewhat different information on
different ppc cpu variants. For those with a hash MMU it's supposed to
include the SDR1, DAR and DSISR registers related to the MMU. However,
the switch is missing a couple of MMU model variants, meaning we will
miss out this information on certain CPUs which should have it.
This patch corrects the oversight. (Really these MMU model IDs need a big
cleanup, but we might as well fix the bug in the interim).
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
---
target-ppc/translate.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/target-ppc/translate.c b/target-ppc/translate.c
index 0057bda..287d679 100644
--- a/target-ppc/translate.c
+++ b/target-ppc/translate.c
@@ -11352,7 +11352,9 @@ void ppc_cpu_dump_state(CPUState *cs, FILE *f, fprintf_function cpu_fprintf,
case POWERPC_MMU_64B:
case POWERPC_MMU_2_03:
case POWERPC_MMU_2_06:
+ case POWERPC_MMU_2_06a:
case POWERPC_MMU_2_07:
+ case POWERPC_MMU_2_07a:
#endif
cpu_fprintf(f, " SDR1 " TARGET_FMT_lx " DAR " TARGET_FMT_lx
" DSISR " TARGET_FMT_lx "\n", env->spr[SPR_SDR1],
--
2.5.0
next prev parent reply other threads:[~2016-02-05 2:13 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-02-05 2:13 [Qemu-devel] [PATCH 0/6] Cleanups to Hash Page Table handling David Gibson
2016-02-05 2:13 ` [Qemu-devel] [PATCH 1/6] target-ppc: Remove unused kvmppc_update_sdr1() stub David Gibson
2016-02-08 5:39 ` Alexey Kardashevskiy
2016-02-05 2:13 ` David Gibson [this message]
2016-02-08 5:39 ` [Qemu-devel] [PATCH 2/6] target-ppc: Include missing MMU models for SDR1 in info registers Alexey Kardashevskiy
2016-02-05 2:13 ` [Qemu-devel] [PATCH 3/6] pseries: Simplify handling of the hash page table fd David Gibson
2016-02-08 6:20 ` Alexey Kardashevskiy
2016-02-05 2:13 ` [Qemu-devel] [PATCH 4/6] pseries: Move hash page table allocation to reset time David Gibson
2016-02-08 4:44 ` Alexey Kardashevskiy
2016-02-08 23:30 ` David Gibson
2016-02-05 2:13 ` [Qemu-devel] [PATCH 5/6] target-ppc: Remove hack for ppc_hash64_load_hpte*() with HV KVM David Gibson
2016-02-08 6:35 ` Alexey Kardashevskiy
2016-02-05 2:13 ` [Qemu-devel] [PATCH 6/6] target-ppc: Add helpers for updating a CPU's SDR1 and external HPT David Gibson
2016-02-08 5:07 ` Alexey Kardashevskiy
2016-02-08 5:11 ` Alexey Kardashevskiy
2016-02-08 23:34 ` David Gibson
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